gpu: nvgpu: decouple sema and hw sema

struct nvgpu_semaphore represents (mainly) a threshold value that a sema
at some index will get and struct nvgpu_semaphore_int (aka "hw_sema")
represents the allocation (and write access) of a semaphore index and
the next value that the sema at that index can have. The threshold
object doesn't need a pointer to the sema allocation that is not even
guaranteed to exist for the whole threshold lifetime, so replace the
pointer by the position of the sema in the sema pool.

This requires some modifications to pass a hw sema around explicitly
because it now represents write access more explicitly.

Delete also the index field of semaphore_int because it can be directly
derived from the offset in the sema location and is thus unnecessary.

Jira NVGPU-512

Change-Id: I40be523fd68327e2f9928f10de4f771fe24d49ee
Signed-off-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1658102
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Konsta Holtta
2018-03-12 10:37:38 +02:00
committed by mobile promotions
parent c6e8257c44
commit 86943d3d03
5 changed files with 62 additions and 55 deletions

View File

@@ -338,8 +338,8 @@ static void gk20a_sync_pt_value_str_for_sema(struct gk20a_sync_pt *pt,
{
struct nvgpu_semaphore *s = pt->sema;
snprintf(str, size, "S: c=%d [v=%u,r_v=%u]",
s->hw_sema->ch->chid,
snprintf(str, size, "S: pool=%d [v=%u,r_v=%u]",
s->location.pool->page_idx,
nvgpu_semaphore_get_value(s),
nvgpu_semaphore_read(s));
}