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gpu: nvgpu: remove GV100 hal support

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GV100 is deprecated and hence remove hal support files for it

Bug 200496768

Change-Id: If898974f98a2905dd94fb5577e82f06b602f3990
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2124913
GVS: Gerrit_Virtual_Submit
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Deepak Nibade
2019-05-24 16:01:31 +05:30
committed by mobile promotions
parent 63b1eee74e
commit 872e4f99a4
8 changed files with 0 additions and 1681 deletions
Download Patch File Download Diff File Expand all files Collapse all files

4
arch/nvgpu-hal-new.yaml
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@@ -40,8 +40,6 @@ init:
hal/init/hal_gm20b.h, hal/init/hal_gm20b.h,
hal/init/hal_gp10b.c, hal/init/hal_gp10b.c,
hal/init/hal_gp10b.h, hal/init/hal_gp10b.h,
hal/init/hal_gv100.c,
hal/init/hal_gv100.h,
hal/init/hal_gv11b.c, hal/init/hal_gv11b.c,
hal/init/hal_gv11b.h, hal/init/hal_gv11b.h,
hal/init/hal_init.c, hal/init/hal_init.c,
@@ -51,8 +49,6 @@ init:
hal/init/hal_gm20b_litter.h, hal/init/hal_gm20b_litter.h,
hal/init/hal_gp10b_litter.c, hal/init/hal_gp10b_litter.c,
hal/init/hal_gp10b_litter.h, hal/init/hal_gp10b_litter.h,
hal/init/hal_gv100_litter.c,
hal/init/hal_gv100_litter.h,
hal/init/hal_gv11b_litter.c, hal/init/hal_gv11b_litter.c,
hal/init/hal_gv11b_litter.h, hal/init/hal_gv11b_litter.h,
hal/init/hal_tu104_litter.c, hal/init/hal_tu104_litter.c,

2
drivers/gpu/nvgpu/Makefile
View File

@@ -217,8 +217,6 @@ nvgpu-y += \
hal/init/hal_gm20b_litter.o \ hal/init/hal_gm20b_litter.o \
hal/init/hal_gp10b.o \ hal/init/hal_gp10b.o \
hal/init/hal_gp10b_litter.o \ hal/init/hal_gp10b_litter.o \
hal/init/hal_gv100.o \
hal/init/hal_gv100_litter.o \
hal/init/hal_gv11b.o \ hal/init/hal_gv11b.o \
hal/init/hal_gv11b_litter.o \ hal/init/hal_gv11b_litter.o \
hal/init/hal_tu104.o \ hal/init/hal_tu104.o \

2
drivers/gpu/nvgpu/Makefile.sources
View File

@@ -482,8 +482,6 @@ srcs += common/engine_queues/engine_emem_queue.c \
hal/gr/intr/gr_intr_tu104.c \ hal/gr/intr/gr_intr_tu104.c \
hal/gr/gr/gr_tu104.c \ hal/gr/gr/gr_tu104.c \
hal/fbpa/fbpa_tu104.c \ hal/fbpa/fbpa_tu104.c \
hal/init/hal_gv100.c \
hal/init/hal_gv100_litter.c \
hal/init/hal_tu104.c \ hal/init/hal_tu104.c \
hal/init/hal_tu104_litter.c \ hal/init/hal_tu104_litter.c \
hal/power_features/cg/gv100_gating_reglist.c \ hal/power_features/cg/gv100_gating_reglist.c \

1429
drivers/gpu/nvgpu/hal/init/hal_gv100.c
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File diff suppressed because it is too large Load Diff

32
drivers/gpu/nvgpu/hal/init/hal_gv100.h
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@@ -1,32 +0,0 @@
/*
* GV100 Tegra HAL interface
*
* Copyright (c) 2017-2018, NVIDIA CORPORATION. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
* DEALINGS IN THE SOFTWARE.
*/
#ifndef NVGPU_HAL_GV100_H
#define NVGPU_HAL_GV100_H
struct gk20a;
int gv100_init_hal(struct gk20a *g);
#endif /* NVGPU_HAL_GV100_H */

178
drivers/gpu/nvgpu/hal/init/hal_gv100_litter.c
View File

@@ -1,178 +0,0 @@
/*
* Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
* DEALINGS IN THE SOFTWARE.
*/
#include <nvgpu/gk20a.h>
#include <nvgpu/class.h>
#include <nvgpu/hw/gv100/hw_proj_gv100.h>
#include "hal_gv100_litter.h"
u32 gv100_get_litter_value(struct gk20a *g, int value)
{
u32 ret = 0;
switch (value) {
case GPU_LIT_NUM_GPCS:
ret = proj_scal_litter_num_gpcs_v();
break;
case GPU_LIT_NUM_PES_PER_GPC:
ret = proj_scal_litter_num_pes_per_gpc_v();
break;
case GPU_LIT_NUM_ZCULL_BANKS:
ret = proj_scal_litter_num_zcull_banks_v();
break;
case GPU_LIT_NUM_TPC_PER_GPC:
ret = proj_scal_litter_num_tpc_per_gpc_v();
break;
case GPU_LIT_NUM_SM_PER_TPC:
ret = proj_scal_litter_num_sm_per_tpc_v();
break;
case GPU_LIT_NUM_FBPS:
ret = proj_scal_litter_num_fbps_v();
break;
case GPU_LIT_GPC_BASE:
ret = proj_gpc_base_v();
break;
case GPU_LIT_GPC_STRIDE:
ret = proj_gpc_stride_v();
break;
case GPU_LIT_GPC_SHARED_BASE:
ret = proj_gpc_shared_base_v();
break;
case GPU_LIT_TPC_IN_GPC_BASE:
ret = proj_tpc_in_gpc_base_v();
break;
case GPU_LIT_TPC_IN_GPC_STRIDE:
ret = proj_tpc_in_gpc_stride_v();
break;
case GPU_LIT_TPC_IN_GPC_SHARED_BASE:
ret = proj_tpc_in_gpc_shared_base_v();
break;
case GPU_LIT_PPC_IN_GPC_BASE:
ret = proj_ppc_in_gpc_base_v();
break;
case GPU_LIT_PPC_IN_GPC_STRIDE:
ret = proj_ppc_in_gpc_stride_v();
break;
case GPU_LIT_PPC_IN_GPC_SHARED_BASE:
ret = proj_ppc_in_gpc_shared_base_v();
break;
case GPU_LIT_ROP_BASE:
ret = proj_rop_base_v();
break;
case GPU_LIT_ROP_STRIDE:
ret = proj_rop_stride_v();
break;
case GPU_LIT_ROP_SHARED_BASE:
ret = proj_rop_shared_base_v();
break;
case GPU_LIT_HOST_NUM_ENGINES:
ret = proj_host_num_engines_v();
break;
case GPU_LIT_HOST_NUM_PBDMA:
ret = proj_host_num_pbdma_v();
break;
case GPU_LIT_LTC_STRIDE:
ret = proj_ltc_stride_v();
break;
case GPU_LIT_LTS_STRIDE:
ret = proj_lts_stride_v();
break;
case GPU_LIT_NUM_FBPAS:
ret = proj_scal_litter_num_fbpas_v();
break;
case GPU_LIT_FBPA_SHARED_BASE:
ret = proj_fbpa_shared_base_v();
break;
case GPU_LIT_FBPA_BASE:
ret = proj_fbpa_base_v();
break;
case GPU_LIT_FBPA_STRIDE:
ret = proj_fbpa_stride_v();
break;
case GPU_LIT_SM_PRI_STRIDE:
ret = proj_sm_stride_v();
break;
case GPU_LIT_SMPC_PRI_BASE:
ret = proj_smpc_base_v();
break;
case GPU_LIT_SMPC_PRI_SHARED_BASE:
ret = proj_smpc_shared_base_v();
break;
case GPU_LIT_SMPC_PRI_UNIQUE_BASE:
ret = proj_smpc_unique_base_v();
break;
case GPU_LIT_SMPC_PRI_STRIDE:
ret = proj_smpc_stride_v();
break;
case GPU_LIT_TWOD_CLASS:
ret = FERMI_TWOD_A;
break;
case GPU_LIT_THREED_CLASS:
ret = VOLTA_A;
break;
case GPU_LIT_COMPUTE_CLASS:
ret = VOLTA_COMPUTE_A;
break;
case GPU_LIT_GPFIFO_CLASS:
ret = VOLTA_CHANNEL_GPFIFO_A;
break;
case GPU_LIT_I2M_CLASS:
ret = KEPLER_INLINE_TO_MEMORY_B;
break;
case GPU_LIT_DMA_COPY_CLASS:
ret = VOLTA_DMA_COPY_A;
break;
case GPU_LIT_GPC_PRIV_STRIDE:
ret = proj_gpc_priv_stride_v();
break;
case GPU_LIT_PERFMON_PMMGPCTPCA_DOMAIN_START:
ret = 2;
break;
case GPU_LIT_PERFMON_PMMGPCTPCB_DOMAIN_START:
ret = 9;
break;
case GPU_LIT_PERFMON_PMMGPCTPC_DOMAIN_COUNT:
ret = 7;
break;
case GPU_LIT_PERFMON_PMMFBP_LTC_DOMAIN_START:
ret = 2;
break;
case GPU_LIT_PERFMON_PMMFBP_LTC_DOMAIN_COUNT:
ret = 4;
break;
case GPU_LIT_PERFMON_PMMFBP_ROP_DOMAIN_START:
ret = 6;
break;
case GPU_LIT_PERFMON_PMMFBP_ROP_DOMAIN_COUNT:
ret = 2;
break;
default:
nvgpu_err(g, "Missing definition %d", value);
BUG();
break;
}
return ret;
}

28
drivers/gpu/nvgpu/hal/init/hal_gv100_litter.h
View File

@@ -1,28 +0,0 @@
/*
* Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
* DEALINGS IN THE SOFTWARE.
*/
#ifndef NVGPU_HAL_GV100_LITTER_H
#define NVGPU_HAL_GV100_LITTER_H
u32 gv100_get_litter_value(struct gk20a *g, int value);
#endif /* NVGPU_HAL_GV100_LITTER_H */

6
drivers/gpu/nvgpu/hal/init/hal_init.c
View File

@@ -32,7 +32,6 @@
#include "hal_gp10b.h" #include "hal_gp10b.h"
#include "hal_gv11b.h" #include "hal_gv11b.h"
#ifdef NVGPU_DGPU_SUPPORT #ifdef NVGPU_DGPU_SUPPORT
#include "hal_gv100.h"
#include "hal_tu104.h" #include "hal_tu104.h"
#endif #endif
@@ -65,11 +64,6 @@ int nvgpu_init_hal(struct gk20a *g)
} }
break; break;
#ifdef NVGPU_DGPU_SUPPORT #ifdef NVGPU_DGPU_SUPPORT
case NVGPU_GPUID_GV100:
if (gv100_init_hal(g) != 0) {
return -ENODEV;
}
break;
#if defined(CONFIG_NVGPU_SUPPORT_TURING) #if defined(CONFIG_NVGPU_SUPPORT_TURING)
case NVGPU_GPUID_TU104: case NVGPU_GPUID_TU104:
if (tu104_init_hal(g) != 0) { if (tu104_init_hal(g) != 0) {