From 88d21daedbaefe4de3894b11e79260ef955ffc33 Mon Sep 17 00:00:00 2001 From: Amurthyreddy Date: Mon, 8 Oct 2018 13:35:15 +0530 Subject: [PATCH] gpu: nvgpu: MISRA 14.4 err/ret/status as boolean MISRA rule 14.4 doesn't allow the usage of integer types as booleans in the controlling expression of an if statement or an iteration statement. Fix violations where the integer variables err, ret, status are used as booleans in the controlling expression of if and loop statements. JIRA NVGPU-1019 Change-Id: Ia2ec5f1db3c7a1884efe5ba7b8b4d9ebbd021734 Signed-off-by: Amurthyreddy Reviewed-on: https://git-master.nvidia.com/r/1921373 Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/common/as.c | 6 +-- drivers/gpu/nvgpu/common/ce2.c | 4 +- drivers/gpu/nvgpu/common/fb/fb_gv11b.c | 16 +++---- drivers/gpu/nvgpu/common/fb/fb_tu104.c | 18 ++++---- drivers/gpu/nvgpu/common/fifo/channel.c | 44 ++++++++++---------- drivers/gpu/nvgpu/common/fifo/submit.c | 24 +++++------ drivers/gpu/nvgpu/common/fifo/tsg.c | 4 +- drivers/gpu/nvgpu/common/ltc/ltc_gm20b.c | 4 +- drivers/gpu/nvgpu/common/ltc/ltc_gp10b.c | 4 +- drivers/gpu/nvgpu/common/ltc/ltc_tu104.c | 4 +- drivers/gpu/nvgpu/common/nvlink.c | 12 +++--- drivers/gpu/nvgpu/common/perf/perfbuf.c | 6 +-- drivers/gpu/nvgpu/common/ptimer/ptimer.c | 2 +- drivers/gpu/nvgpu/common/semaphore.c | 8 ++-- drivers/gpu/nvgpu/common/sim.c | 6 +-- drivers/gpu/nvgpu/common/sim_pci.c | 6 +-- drivers/gpu/nvgpu/common/sync/channel_sync.c | 4 +- drivers/gpu/nvgpu/common/therm/therm.c | 4 +- drivers/gpu/nvgpu/common/vbios/bios.c | 12 +++--- drivers/gpu/nvgpu/common/xve/xve_gp106.c | 2 +- drivers/gpu/nvgpu/gm20b/acr_gm20b.c | 14 +++---- drivers/gpu/nvgpu/gm20b/clk_gm20b.c | 18 ++++---- drivers/gpu/nvgpu/gm20b/fifo_gm20b.c | 2 +- drivers/gpu/nvgpu/gm20b/gr_gm20b.c | 12 +++--- 24 files changed, 118 insertions(+), 118 deletions(-) diff --git a/drivers/gpu/nvgpu/common/as.c b/drivers/gpu/nvgpu/common/as.c index d6dff9d46..f5078b49c 100644 --- a/drivers/gpu/nvgpu/common/as.c +++ b/drivers/gpu/nvgpu/common/as.c @@ -115,13 +115,13 @@ int gk20a_as_alloc_share(struct gk20a *g, /* this will set as_share->vm. */ err = gk20a_busy(g); - if (err) { + if (err != 0) { goto failed; } err = gk20a_vm_alloc_share(as_share, big_page_size, flags); gk20a_idle(g); - if (err) { + if (err != 0) { goto failed; } @@ -161,7 +161,7 @@ int gk20a_as_release_share(struct gk20a_as_share *as_share) err = gk20a_busy(g); - if (err) { + if (err != 0) { goto release_fail; } diff --git a/drivers/gpu/nvgpu/common/ce2.c b/drivers/gpu/nvgpu/common/ce2.c index 6a45c7e06..0b74ca285 100644 --- a/drivers/gpu/nvgpu/common/ce2.c +++ b/drivers/gpu/nvgpu/common/ce2.c @@ -108,7 +108,7 @@ int gk20a_ce_execute_ops(struct gk20a *g, gk20a_fence_put(*prev_post_fence); *prev_post_fence = NULL; - if (ret) + if (ret != 0) goto noop; } @@ -141,7 +141,7 @@ int gk20a_ce_execute_ops(struct gk20a *g, ret = nvgpu_submit_channel_gpfifo_kernel(ce_ctx->ch, &gpfifo, 1, submit_flags, &fence, &ce_cmd_buf_fence_out); - if (!ret) { + if (ret == 0) { ce_ctx->postfences[ce_ctx->cmd_buf_read_queue_offset] = ce_cmd_buf_fence_out; if (gk20a_fence_out) { diff --git a/drivers/gpu/nvgpu/common/fb/fb_gv11b.c b/drivers/gpu/nvgpu/common/fb/fb_gv11b.c index 30bf17f80..12b0a6d8c 100644 --- a/drivers/gpu/nvgpu/common/fb/fb_gv11b.c +++ b/drivers/gpu/nvgpu/common/fb/fb_gv11b.c @@ -861,7 +861,7 @@ static void gv11b_fb_handle_mmu_fault_common(struct gk20a *g, mmfault->faulted_pbdma, mmfault->faulted_engine); } - if (!err) { + if (err == 0) { nvgpu_log(g, gpu_dbg_intr, "CE Page Fault Fixed"); *invalidate_replay_val = 0; if (mmfault->refch) { @@ -945,7 +945,7 @@ static void gv11b_fb_handle_mmu_fault_common(struct gk20a *g, if (mmfault->fault_type == gmmu_fault_type_pte_v()) { nvgpu_log(g, gpu_dbg_intr, "invalid pte! try to fix"); err = gv11b_fb_fix_page_fault(g, mmfault); - if (err) { + if (err != 0) { *invalidate_replay_val |= fb_mmu_invalidate_replay_cancel_global_f(); } else { @@ -1396,17 +1396,17 @@ void gv11b_fb_hub_isr(struct gk20a *g) nvgpu_info(g, "ecc uncorrected error notify"); status = gk20a_readl(g, fb_mmu_l2tlb_ecc_status_r()); - if (status) { + if (status != 0U) { gv11b_handle_l2tlb_ecc_isr(g, status); } status = gk20a_readl(g, fb_mmu_hubtlb_ecc_status_r()); - if (status) { + if (status != 0U) { gv11b_handle_hubtlb_ecc_isr(g, status); } status = gk20a_readl(g, fb_mmu_fillunit_ecc_status_r()); - if (status) { + if (status != 0U) { gv11b_handle_fillunit_ecc_isr(g, status); } } @@ -1471,7 +1471,7 @@ int gv11b_fb_mmu_invalidate_replay(struct gk20a *g, nvgpu_udelay(5); } while (!nvgpu_timeout_expired_msg(&timeout, "invalidate replay failed on 0x%llx")); - if (err) { + if (err != 0) { nvgpu_err(g, "invalidate replay timedout"); } @@ -1493,7 +1493,7 @@ static int gv11b_fb_fix_page_fault(struct gk20a *g, err = __nvgpu_get_pte(g, mmfault->refch->vm, mmfault->fault_addr, &pte[0]); - if (err) { + if (err != 0) { nvgpu_log(g, gpu_dbg_intr | gpu_dbg_pte, "pte not found"); return err; } @@ -1520,7 +1520,7 @@ static int gv11b_fb_fix_page_fault(struct gk20a *g, err = __nvgpu_set_pte(g, mmfault->refch->vm, mmfault->fault_addr, &pte[0]); - if (err) { + if (err != 0) { nvgpu_log(g, gpu_dbg_intr | gpu_dbg_pte, "pte not fixed"); return err; } diff --git a/drivers/gpu/nvgpu/common/fb/fb_tu104.c b/drivers/gpu/nvgpu/common/fb/fb_tu104.c index 4095cafeb..499d94ed2 100644 --- a/drivers/gpu/nvgpu/common/fb/fb_tu104.c +++ b/drivers/gpu/nvgpu/common/fb/fb_tu104.c @@ -209,17 +209,17 @@ void tu104_fb_hub_isr(struct gk20a *g) fb_mmu_int_vector_ecc_error_vector_v(ecc_error)); status = nvgpu_readl(g, fb_mmu_l2tlb_ecc_status_r()); - if (status) { + if (status != 0U) { gv11b_handle_l2tlb_ecc_isr(g, status); } status = nvgpu_readl(g, fb_mmu_hubtlb_ecc_status_r()); - if (status) { + if (status != 0U) { gv11b_handle_hubtlb_ecc_isr(g, status); } status = nvgpu_readl(g, fb_mmu_fillunit_ecc_status_r()); - if (status) { + if (status != 0U) { gv11b_handle_fillunit_ecc_isr(g, status); } } @@ -416,7 +416,7 @@ int fb_tu104_mmu_invalidate_replay(struct gk20a *g, nvgpu_udelay(5); } while (!nvgpu_timeout_expired_msg(&timeout, "invalidate replay failed on 0x%llx")); - if (err) { + if (err != 0) { nvgpu_err(g, "invalidate replay timedout"); } @@ -477,7 +477,7 @@ static int tu104_fb_wait_mmu_bind(struct gk20a *g) int err; err = nvgpu_timeout_init(g, &timeout, 1000, NVGPU_TIMER_RETRY_TIMER); - if (err) { + if (err != 0) { return err; } @@ -523,7 +523,7 @@ int tu104_fb_apply_pdb_cache_war(struct gk20a *g) fb_mmu_bind_trigger_true_f()); err = tu104_fb_wait_mmu_bind(g); - if (err) { + if (err != 0) { return err; } } @@ -538,7 +538,7 @@ int tu104_fb_apply_pdb_cache_war(struct gk20a *g) fb_mmu_bind_trigger_true_f()); err = tu104_fb_wait_mmu_bind(g); - if (err) { + if (err != 0) { return err; } @@ -548,7 +548,7 @@ int tu104_fb_apply_pdb_cache_war(struct gk20a *g) fb_mmu_bind_trigger_true_f()); err = tu104_fb_wait_mmu_bind(g); - if (err) { + if (err != 0) { return err; } @@ -568,7 +568,7 @@ int tu104_fb_apply_pdb_cache_war(struct gk20a *g) fb_mmu_bind_trigger_true_f()); err = tu104_fb_wait_mmu_bind(g); - if (err) { + if (err != 0) { return err; } diff --git a/drivers/gpu/nvgpu/common/fifo/channel.c b/drivers/gpu/nvgpu/common/fifo/channel.c index c76aae9ea..6f9472dab 100644 --- a/drivers/gpu/nvgpu/common/fifo/channel.c +++ b/drivers/gpu/nvgpu/common/fifo/channel.c @@ -322,7 +322,7 @@ static void gk20a_free_channel(struct channel_gk20a *ch, bool force) /* abort channel and remove from runlist */ if (gk20a_is_channel_marked_as_tsg(ch)) { err = gk20a_tsg_unbind_channel(ch); - if (err) { + if (err != 0) { nvgpu_err(g, "failed to unbind channel %d from TSG", ch->chid); @@ -603,7 +603,7 @@ struct channel_gk20a *_gk20a_channel_get(struct channel_gk20a *ch, nvgpu_spinlock_release(&ch->ref_obtain_lock); - if (ret) { + if (ret != NULL) { trace_gk20a_channel_get(ch->chid, caller); } @@ -762,7 +762,7 @@ static int channel_gk20a_alloc_priv_cmdbuf(struct channel_gk20a *c) 2 * 18 * sizeof(u32) / 3); err = nvgpu_dma_alloc_map_sys(ch_vm, size, &q->mem); - if (err) { + if (err != 0) { nvgpu_err(g, "%s: memory allocation failed", __func__); goto clean_up; } @@ -1046,7 +1046,7 @@ static int channel_gk20a_prealloc_resources(struct channel_gk20a *c, /* pre-allocate a fence pool */ err = gk20a_alloc_fence_pool(c, num_jobs); - if (err) { + if (err != 0) { goto clean_up_priv_cmd; } @@ -1117,7 +1117,7 @@ int nvgpu_channel_setup_bind(struct channel_gk20a *c, * busy lock. */ err = gk20a_busy(g); - if (err) { + if (err != 0) { nvgpu_rwsem_up_read(&g->deterministic_busy); return err; } @@ -1146,7 +1146,7 @@ int nvgpu_channel_setup_bind(struct channel_gk20a *c, if (args->flags & NVGPU_SETUP_BIND_FLAGS_USERMODE_SUPPORT) { if (g->os_channel.alloc_usermode_buffers) { err = g->os_channel.alloc_usermode_buffers(c, args); - if (err) { + if (err != 0) { nvgpu_err(g, "Usermode buffer alloc failed"); goto clean_up; } @@ -1163,7 +1163,7 @@ int nvgpu_channel_setup_bind(struct channel_gk20a *c, err = nvgpu_dma_alloc_map_sys(ch_vm, gpfifo_size * gpfifo_entry_size, &c->gpfifo.mem); - if (err) { + if (err != 0) { nvgpu_err(g, "memory allocation failed"); goto clean_up; } @@ -1199,7 +1199,7 @@ int nvgpu_channel_setup_bind(struct channel_gk20a *c, if (g->ops.fifo.resetup_ramfc) { err = g->ops.fifo.resetup_ramfc(c); - if (err) { + if (err != 0) { goto clean_up_sync; } } @@ -1214,7 +1214,7 @@ int nvgpu_channel_setup_bind(struct channel_gk20a *c, err = g->ops.fifo.setup_ramfc(c, gpfifo_gpu_va, c->gpfifo.entry_num, acquire_timeout, args->flags); - if (err) { + if (err != 0) { goto clean_up_sync; } @@ -1223,18 +1223,18 @@ int nvgpu_channel_setup_bind(struct channel_gk20a *c, if (args->num_inflight_jobs) { err = channel_gk20a_prealloc_resources(c, args->num_inflight_jobs); - if (err) { + if (err != 0) { goto clean_up_sync; } } err = channel_gk20a_alloc_priv_cmdbuf(c); - if (err) { + if (err != 0) { goto clean_up_prealloc; } err = channel_gk20a_update_runlist(c, true); - if (err) { + if (err != 0) { goto clean_up_priv_cmd; } @@ -1737,13 +1737,13 @@ int nvgpu_channel_worker_init(struct gk20a *g) nvgpu_init_list_node(&g->channel_worker.items); nvgpu_spinlock_init(&g->channel_worker.items_lock); err = nvgpu_mutex_init(&g->channel_worker.start_lock); - if (err) { + if (err != 0) { goto error_check; } err = __nvgpu_channel_worker_start(g); error_check: - if (err) { + if (err != 0) { nvgpu_err(g, "failed to start channel poller thread"); return err; } @@ -1844,7 +1844,7 @@ int gk20a_channel_add_job(struct channel_gk20a *c, if (!skip_buffer_refcounting) { err = nvgpu_vm_get_buffers(vm, &mapped_buffers, &num_mapped_buffers); - if (err) { + if (err != 0) { return err; } } @@ -2174,31 +2174,31 @@ int gk20a_init_channel_support(struct gk20a *g, u32 chid) nvgpu_init_list_node(&c->worker_item); err = nvgpu_mutex_init(&c->ioctl_lock); - if (err) { + if (err != 0) { return err; } err = nvgpu_mutex_init(&c->joblist.cleanup_lock); - if (err) { + if (err != 0) { goto fail_1; } err = nvgpu_mutex_init(&c->joblist.pre_alloc.read_lock); - if (err) { + if (err != 0) { goto fail_2; } err = nvgpu_mutex_init(&c->sync_lock); - if (err) { + if (err != 0) { goto fail_3; } #if defined(CONFIG_GK20A_CYCLE_STATS) err = nvgpu_mutex_init(&c->cyclestate.cyclestate_buffer_mutex); - if (err) + if (err != 0) goto fail_4; err = nvgpu_mutex_init(&c->cs_client_mutex); - if (err) + if (err != 0) goto fail_5; #endif err = nvgpu_mutex_init(&c->dbg_s_lock); - if (err) { + if (err != 0) { goto fail_6; } diff --git a/drivers/gpu/nvgpu/common/fifo/submit.c b/drivers/gpu/nvgpu/common/fifo/submit.c index b6bf840ad..601a59ec9 100644 --- a/drivers/gpu/nvgpu/common/fifo/submit.c +++ b/drivers/gpu/nvgpu/common/fifo/submit.c @@ -70,7 +70,7 @@ static int nvgpu_submit_prepare_syncs(struct channel_gk20a *c, if (g->ops.fifo.resetup_ramfc && new_sync_created) { err = g->ops.fifo.resetup_ramfc(c); - if (err) { + if (err != 0) { goto fail; } } @@ -102,7 +102,7 @@ static int nvgpu_submit_prepare_syncs(struct channel_gk20a *c, job->wait_cmd); } - if (err) { + if (err != 0) { goto clean_up_wait_cmd; } @@ -144,7 +144,7 @@ static int nvgpu_submit_prepare_syncs(struct channel_gk20a *c, job->post_fence, need_sync_fence, register_irq); } - if (!err) { + if (err == 0) { *incr_cmd = job->incr_cmd; *post_fence = job->post_fence; } else { @@ -215,21 +215,21 @@ static int nvgpu_submit_append_gpfifo_user_direct(struct channel_gk20a *c, err = g->os_channel.copy_user_gpfifo( gpfifo_cpu + start, userdata, 0, length0); - if (err) { + if (err != 0) { return err; } err = g->os_channel.copy_user_gpfifo( gpfifo_cpu, userdata, length0, length1); - if (err) { + if (err != 0) { return err; } } else { err = g->os_channel.copy_user_gpfifo( gpfifo_cpu + start, userdata, 0, len); - if (err) { + if (err != 0) { return err; } } @@ -282,14 +282,14 @@ static int nvgpu_submit_append_gpfifo(struct channel_gk20a *c, */ err = nvgpu_submit_append_gpfifo_user_direct(c, userdata, num_entries); - if (err) { + if (err != 0) { return err; } } else if (!kern_gpfifo) { /* from userspace to vidmem, use the common path */ err = g->os_channel.copy_user_gpfifo(c->gpfifo.pipe, userdata, 0, num_entries); - if (err) { + if (err != 0) { return err; } @@ -451,7 +451,7 @@ static int nvgpu_submit_channel_gpfifo(struct channel_gk20a *c, * via syncpt or sema interrupt, whichever is used. */ err = gk20a_busy(g); - if (err) { + if (err != 0) { nvgpu_err(g, "failed to host gk20a to submit gpfifo"); nvgpu_print_current(g, NULL, NVGPU_ERROR); @@ -511,7 +511,7 @@ static int nvgpu_submit_channel_gpfifo(struct channel_gk20a *c, if (need_job_tracking) { err = channel_gk20a_alloc_job(c, &job); - if (err) { + if (err != 0) { goto clean_up; } @@ -520,7 +520,7 @@ static int nvgpu_submit_channel_gpfifo(struct channel_gk20a *c, &post_fence, need_deferred_cleanup, flags); - if (err) { + if (err != 0) { goto clean_up_job; } } @@ -533,7 +533,7 @@ static int nvgpu_submit_channel_gpfifo(struct channel_gk20a *c, err = nvgpu_submit_append_gpfifo(c, gpfifo, userdata, num_entries); - if (err) { + if (err != 0) { goto clean_up_job; } diff --git a/drivers/gpu/nvgpu/common/fifo/tsg.c b/drivers/gpu/nvgpu/common/fifo/tsg.c index 99c2e6f04..75e477626 100644 --- a/drivers/gpu/nvgpu/common/fifo/tsg.c +++ b/drivers/gpu/nvgpu/common/fifo/tsg.c @@ -156,7 +156,7 @@ int gk20a_tsg_unbind_channel(struct channel_gk20a *ch) int err; err = g->ops.fifo.tsg_unbind_channel(ch); - if (err) { + if (err != 0) { nvgpu_err(g, "Channel %d unbind failed, tearing down TSG %d", ch->chid, tsg->tsgid); @@ -197,7 +197,7 @@ int gk20a_init_tsg_support(struct gk20a *g, u32 tsgid) nvgpu_init_list_node(&tsg->event_id_list); err = nvgpu_mutex_init(&tsg->event_id_list_lock); - if (err) { + if (err != 0) { tsg->in_use = true; /* make this TSG unusable */ return err; } diff --git a/drivers/gpu/nvgpu/common/ltc/ltc_gm20b.c b/drivers/gpu/nvgpu/common/ltc/ltc_gm20b.c index 07dfeddf2..e7f330d65 100644 --- a/drivers/gpu/nvgpu/common/ltc/ltc_gm20b.c +++ b/drivers/gpu/nvgpu/common/ltc/ltc_gm20b.c @@ -92,12 +92,12 @@ int gm20b_ltc_init_comptags(struct gk20a *g, struct gr_gk20a *gr) max_comptag_lines); err = nvgpu_ltc_alloc_cbc(g, compbit_backing_size, false); - if (err) { + if (err != 0) { return err; } err = gk20a_comptag_allocator_init(g, &gr->comp_tags, max_comptag_lines); - if (err) { + if (err != 0) { return err; } diff --git a/drivers/gpu/nvgpu/common/ltc/ltc_gp10b.c b/drivers/gpu/nvgpu/common/ltc/ltc_gp10b.c index 6508679dc..0696892b5 100644 --- a/drivers/gpu/nvgpu/common/ltc/ltc_gp10b.c +++ b/drivers/gpu/nvgpu/common/ltc/ltc_gp10b.c @@ -116,12 +116,12 @@ int gp10b_ltc_init_comptags(struct gk20a *g, struct gr_gk20a *gr) gobs_per_comptagline_per_slice); err = nvgpu_ltc_alloc_cbc(g, compbit_backing_size, false); - if (err) { + if (err != 0) { return err; } err = gk20a_comptag_allocator_init(g, &gr->comp_tags, max_comptag_lines); - if (err) { + if (err != 0) { return err; } diff --git a/drivers/gpu/nvgpu/common/ltc/ltc_tu104.c b/drivers/gpu/nvgpu/common/ltc/ltc_tu104.c index c1be6dc4d..2e5c3042c 100644 --- a/drivers/gpu/nvgpu/common/ltc/ltc_tu104.c +++ b/drivers/gpu/nvgpu/common/ltc/ltc_tu104.c @@ -110,12 +110,12 @@ int ltc_tu104_init_comptags(struct gk20a *g, struct gr_gk20a *gr) compbit_backing_size = roundup(compbit_backing_size, 64 * 1024); err = nvgpu_ltc_alloc_cbc(g, compbit_backing_size, true); - if (err) { + if (err != 0) { return err; } err = gk20a_comptag_allocator_init(g, &gr->comp_tags, max_comptag_lines); - if (err) { + if (err != 0) { return err; } diff --git a/drivers/gpu/nvgpu/common/nvlink.c b/drivers/gpu/nvgpu/common/nvlink.c index 8f0bf94a2..714915666 100644 --- a/drivers/gpu/nvgpu/common/nvlink.c +++ b/drivers/gpu/nvgpu/common/nvlink.c @@ -479,23 +479,23 @@ int nvgpu_nvlink_probe(struct gk20a *g) g->nvlink.priv = (void *) ndev; err = nvgpu_nvlink_read_dt_props(g); - if (err) + if (err != 0) goto free_ndev; err = nvgpu_nvlink_init_ops(g); - if (err) + if (err != 0) goto free_ndev; /* Register device with core driver*/ err = nvlink_register_device(ndev); - if (err) { + if (err != 0) { nvgpu_err(g, "failed on nvlink device registration"); goto free_ndev; } /* Register link with core driver */ err = nvlink_register_link(&ndev->link); - if (err) { + if (err != 0) { nvgpu_err(g, "failed on nvlink link registration"); goto unregister_ndev; } @@ -532,13 +532,13 @@ int nvgpu_nvlink_remove(struct gk20a *g) __nvgpu_set_enabled(g, NVGPU_SUPPORT_NVLINK, false); err = nvlink_unregister_link(&ndev->link); - if (err) { + if (err != 0) { nvgpu_err(g, "failed on nvlink link unregistration"); return err; } err = nvlink_unregister_device(ndev); - if (err) { + if (err != 0) { nvgpu_err(g, "failed on nvlink device unregistration"); return err; } diff --git a/drivers/gpu/nvgpu/common/perf/perfbuf.c b/drivers/gpu/nvgpu/common/perf/perfbuf.c index 3f9d30573..43611da79 100644 --- a/drivers/gpu/nvgpu/common/perf/perfbuf.c +++ b/drivers/gpu/nvgpu/common/perf/perfbuf.c @@ -31,13 +31,13 @@ int nvgpu_perfbuf_enable_locked(struct gk20a *g, u64 offset, u32 size) int err; err = gk20a_busy(g); - if (err) { + if (err != 0) { nvgpu_err(g, "failed to poweron"); return err; } err = g->ops.mm.alloc_inst_block(g, &mm->perfbuf.inst_block); - if (err) { + if (err != 0) { return err; } @@ -54,7 +54,7 @@ int nvgpu_perfbuf_enable_locked(struct gk20a *g, u64 offset, u32 size) int nvgpu_perfbuf_disable_locked(struct gk20a *g) { int err = gk20a_busy(g); - if (err) { + if (err != 0) { nvgpu_err(g, "failed to poweron"); return err; } diff --git a/drivers/gpu/nvgpu/common/ptimer/ptimer.c b/drivers/gpu/nvgpu/common/ptimer/ptimer.c index 4f0b31315..1b93f57f4 100644 --- a/drivers/gpu/nvgpu/common/ptimer/ptimer.c +++ b/drivers/gpu/nvgpu/common/ptimer/ptimer.c @@ -39,7 +39,7 @@ int nvgpu_get_timestamps_zipper(struct gk20a *g, for (i = 0; i < count; i++) { err = g->ops.ptimer.read_ptimer(g, &samples[i].gpu_timestamp); - if (err) { + if (err != 0) { return err; } diff --git a/drivers/gpu/nvgpu/common/semaphore.c b/drivers/gpu/nvgpu/common/semaphore.c index 2e00b5089..6f4eaa5af 100644 --- a/drivers/gpu/nvgpu/common/semaphore.c +++ b/drivers/gpu/nvgpu/common/semaphore.c @@ -67,7 +67,7 @@ static int __nvgpu_semaphore_sea_grow(struct nvgpu_semaphore_sea *sea) ret = nvgpu_dma_alloc_sys(gk20a, PAGE_SIZE * SEMAPHORE_POOL_COUNT, &sea->sea_mem); - if (ret) { + if (ret != 0) { goto out; } @@ -170,7 +170,7 @@ int nvgpu_semaphore_pool_alloc(struct nvgpu_semaphore_sea *sea, __lock_sema_sea(sea); ret = nvgpu_mutex_init(&p->pool_lock); - if (ret) { + if (ret != 0) { goto fail; } @@ -254,7 +254,7 @@ int nvgpu_semaphore_pool_map(struct nvgpu_semaphore_pool *p, err = nvgpu_mem_create_from_mem(vm->mm->g, &p->rw_mem, &p->sema_sea->sea_mem, p->page_idx, 1); - if (err) { + if (err != 0) { goto fail_unmap; } @@ -443,7 +443,7 @@ struct nvgpu_semaphore *nvgpu_semaphore_alloc(struct channel_gk20a *ch) if (ch->hw_sema == NULL) { ret = __nvgpu_init_hw_sema(ch); - if (ret) { + if (ret != 0) { return NULL; } } diff --git a/drivers/gpu/nvgpu/common/sim.c b/drivers/gpu/nvgpu/common/sim.c index 8ad39b8cf..df27f7936 100644 --- a/drivers/gpu/nvgpu/common/sim.c +++ b/drivers/gpu/nvgpu/common/sim.c @@ -193,14 +193,14 @@ static int issue_rpc_and_wait(struct gk20a *g) int err; err = rpc_send_message(g); - if (err) { + if (err != 0) { nvgpu_err(g, "%s failed rpc_send_message", __func__); return err; } err = rpc_recv_poll(g); - if (err) { + if (err != 0) { nvgpu_err(g, "%s failed rpc_recv_poll", __func__); return err; @@ -297,7 +297,7 @@ int nvgpu_init_sim_support(struct gk20a *g) err = err || nvgpu_alloc_sim_buffer(g, &g->sim->recv_bfr); err = err || nvgpu_alloc_sim_buffer(g, &g->sim->msg_bfr); - if (err) + if (err != 0) goto fail; g->sim->sim_init_late = nvgpu_sim_init_late; diff --git a/drivers/gpu/nvgpu/common/sim_pci.c b/drivers/gpu/nvgpu/common/sim_pci.c index cd7d90cae..3c4c4f877 100644 --- a/drivers/gpu/nvgpu/common/sim_pci.c +++ b/drivers/gpu/nvgpu/common/sim_pci.c @@ -164,13 +164,13 @@ static int issue_rpc_and_wait(struct gk20a *g) int err; err = rpc_send_message(g); - if (err) { + if (err != 0) { nvgpu_err(g, "failed rpc_send_message"); return err; } err = rpc_recv_poll(g); - if (err) { + if (err != 0) { nvgpu_err(g, "failed rpc_recv_poll"); return err; } @@ -263,7 +263,7 @@ int nvgpu_init_sim_support_pci(struct gk20a *g) err = err || nvgpu_alloc_sim_buffer(g, &g->sim->recv_bfr); err = err || nvgpu_alloc_sim_buffer(g, &g->sim->msg_bfr); - if (err) + if (err != 0) goto fail; g->sim->sim_init_late = nvgpu_sim_init_late; diff --git a/drivers/gpu/nvgpu/common/sync/channel_sync.c b/drivers/gpu/nvgpu/common/sync/channel_sync.c index 4d629ece7..5d24b0177 100644 --- a/drivers/gpu/nvgpu/common/sync/channel_sync.c +++ b/drivers/gpu/nvgpu/common/sync/channel_sync.c @@ -539,7 +539,7 @@ static int channel_sync_semaphore_incr_common( incr_cmd_size = c->g->ops.fifo.get_sema_incr_cmd_size(); err = gk20a_channel_alloc_priv_cmdbuf(c, incr_cmd_size, incr_cmd); - if (err) { + if (err != 0) { nvgpu_err(c->g, "not enough priv cmd buffer space"); goto clean_up_sema; @@ -552,7 +552,7 @@ static int channel_sync_semaphore_incr_common( err = nvgpu_os_fence_sema_create(&os_fence, c, semaphore); - if (err) { + if (err != 0) { goto clean_up_sema; } } diff --git a/drivers/gpu/nvgpu/common/therm/therm.c b/drivers/gpu/nvgpu/common/therm/therm.c index 8c88ff0df..89428c1dc 100644 --- a/drivers/gpu/nvgpu/common/therm/therm.c +++ b/drivers/gpu/nvgpu/common/therm/therm.c @@ -27,13 +27,13 @@ int nvgpu_init_therm_support(struct gk20a *g) { - u32 err = 0U; + int err = 0; nvgpu_log_fn(g, " "); if (g->ops.therm.init_therm_setup_hw) err = g->ops.therm.init_therm_setup_hw(g); - if (err) + if (err != 0) return err; #ifdef CONFIG_DEBUG_FS diff --git a/drivers/gpu/nvgpu/common/vbios/bios.c b/drivers/gpu/nvgpu/common/vbios/bios.c index 93c4f440d..9338f759a 100644 --- a/drivers/gpu/nvgpu/common/vbios/bios.c +++ b/drivers/gpu/nvgpu/common/vbios/bios.c @@ -608,14 +608,14 @@ static int nvgpu_bios_parse_falcon_ucode_table(struct gk20a *g, int offset) err = nvgpu_bios_parse_falcon_ucode_desc(g, &g->bios.devinit, entry.desc_ptr); - if (err) { + if (err != 0) { err = nvgpu_bios_parse_falcon_ucode_desc(g, &g->bios.devinit, entry.desc_ptr + g->bios.expansion_rom_offset); } - if (err) { + if (err != 0) { nvgpu_err(g, "could not parse devinit ucode desc"); } @@ -625,14 +625,14 @@ static int nvgpu_bios_parse_falcon_ucode_table(struct gk20a *g, int offset) err = nvgpu_bios_parse_falcon_ucode_desc(g, &g->bios.preos, entry.desc_ptr); - if (err) { + if (err != 0) { err = nvgpu_bios_parse_falcon_ucode_desc(g, &g->bios.preos, entry.desc_ptr + g->bios.expansion_rom_offset); } - if (err) { + if (err != 0) { nvgpu_err(g, "could not parse preos ucode desc"); } @@ -654,13 +654,13 @@ static void nvgpu_bios_parse_falcon_data_v2(struct gk20a *g, int offset) falcon_data.falcon_ucode_table_ptr); err = nvgpu_bios_parse_falcon_ucode_table(g, falcon_data.falcon_ucode_table_ptr); - if (err) { + if (err != 0) { err = nvgpu_bios_parse_falcon_ucode_table(g, falcon_data.falcon_ucode_table_ptr + g->bios.expansion_rom_offset); } - if (err) { + if (err != 0) { nvgpu_err(g, "could not parse falcon ucode table"); } } diff --git a/drivers/gpu/nvgpu/common/xve/xve_gp106.c b/drivers/gpu/nvgpu/common/xve/xve_gp106.c index d5e5f7545..f5033a74f 100644 --- a/drivers/gpu/nvgpu/common/xve/xve_gp106.c +++ b/drivers/gpu/nvgpu/common/xve/xve_gp106.c @@ -465,7 +465,7 @@ int xve_set_speed_gp106(struct gk20a *g, u32 next_link_speed) } err = g->ops.xve.get_speed(g, ¤t_link_speed); - if (err) { + if (err != 0) { return err; } diff --git a/drivers/gpu/nvgpu/gm20b/acr_gm20b.c b/drivers/gpu/nvgpu/gm20b/acr_gm20b.c index a30384388..da9b28ce0 100644 --- a/drivers/gpu/nvgpu/gm20b/acr_gm20b.c +++ b/drivers/gpu/nvgpu/gm20b/acr_gm20b.c @@ -115,7 +115,7 @@ static int pmu_ucode_details(struct gk20a *g, struct flcn_ucode_img *p_img) g->acr.pmu_desc = pmu_desc; err = nvgpu_init_pmu_fw_support(pmu); - if (err) { + if (err != 0) { nvgpu_pmu_dbg(g, "failed to set function pointers\n"); goto release_sig; } @@ -348,7 +348,7 @@ int prepare_ucode_blob(struct gk20a *g) /*Recovery case, we do not need to form non WPR blob of ucodes*/ err = nvgpu_init_pmu_fw_support(pmu); - if (err) { + if (err != 0) { nvgpu_pmu_dbg(g, "failed to set function pointers\n"); return err; } @@ -367,7 +367,7 @@ int prepare_ucode_blob(struct gk20a *g) /* Discover all managed falcons*/ err = lsfm_discover_ucode_images(g, plsfm); nvgpu_pmu_dbg(g, " Managed Falcon cnt %d\n", plsfm->managed_flcn_cnt); - if (err) { + if (err != 0) { goto free_sgt; } @@ -375,14 +375,14 @@ int prepare_ucode_blob(struct gk20a *g) (g->acr.ucode_blob.cpu_va == NULL)) { /* Generate WPR requirements*/ err = lsf_gen_wpr_requirements(g, plsfm); - if (err) { + if (err != 0) { goto free_sgt; } /*Alloc memory to hold ucode blob contents*/ err = g->acr.alloc_blob_space(g, plsfm->wpr_size , &g->acr.ucode_blob); - if (err) { + if (err != 0) { goto free_sgt; } @@ -418,7 +418,7 @@ static int lsfm_discover_ucode_images(struct gk20a *g, /* Obtain the PMU ucode image and add it to the list if required*/ memset(&ucode_img, 0, sizeof(ucode_img)); status = pmu_ucode_details(g, &ucode_img); - if (status) { + if (status != 0) { return status; } @@ -1118,7 +1118,7 @@ static int gm20b_acr_hs_bl_exec(struct gk20a *g, struct nvgpu_acr *acr, hs_bl->hs_bl_ucode.size = bl_sz; err = nvgpu_dma_alloc_sys(g, bl_sz, &hs_bl->hs_bl_ucode); - if (err) { + if (err != 0) { nvgpu_err(g, "ACR HS BL failed to allocate memory"); goto err_done; } diff --git a/drivers/gpu/nvgpu/gm20b/clk_gm20b.c b/drivers/gpu/nvgpu/gm20b/clk_gm20b.c index b6e97c093..728e1e97d 100644 --- a/drivers/gpu/nvgpu/gm20b/clk_gm20b.c +++ b/drivers/gpu/nvgpu/gm20b/clk_gm20b.c @@ -287,7 +287,7 @@ static int nvgpu_fuse_calib_gpcpll_get_adc(struct gk20a *g, int ret; ret = nvgpu_tegra_fuse_read_reserved_calib(g, &val); - if (ret) { + if (ret != 0) { return ret; } @@ -932,7 +932,7 @@ static int clk_program_gpc_pll(struct gk20a *g, struct pll *gpll_new, clk_config_dvfs_ndiv(gpll.dvfs.mv, gpll.N, &gpll.dvfs); } ret = clk_slide_gpc_pll(g, &gpll); - if (ret) { + if (ret != 0) { return ret; } } @@ -1112,7 +1112,7 @@ static int clk_program_na_gpc_pll(struct gk20a *g, struct pll *gpll_new, clk_config_pll_safe_dvfs(g, &gpll_safe); ret = clk_program_gpc_pll(g, &gpll_safe, true); - if (ret) { + if (ret != 0) { nvgpu_err(g, "Safe dvfs program fail"); return ret; } @@ -1200,7 +1200,7 @@ int gm20b_init_clk_setup_sw(struct gk20a *g) nvgpu_log_fn(g, " "); err = nvgpu_mutex_init(&clk->clk_mutex); - if (err) { + if (err != 0) { return err; } @@ -1466,7 +1466,7 @@ static int set_pll_freq(struct gk20a *g, bool allow_slide) int gm20b_init_clk_support(struct gk20a *g) { struct clk_gk20a *clk = &g->clk; - u32 err; + int err; nvgpu_log_fn(g, " "); @@ -1475,13 +1475,13 @@ int gm20b_init_clk_support(struct gk20a *g) err = gm20b_init_clk_setup_hw(g); nvgpu_mutex_release(&clk->clk_mutex); - if (err) { + if (err != 0) { return err; } /* FIXME: this effectively prevents host level clock gating */ err = g->ops.clk.prepare_enable(&g->clk); - if (err) { + if (err != 0) { return err; } @@ -1526,7 +1526,7 @@ int gm20b_clk_get_voltage(struct clk_gk20a *clk, u64 *val) } err = gk20a_busy(g); - if (err) { + if (err != 0) { return err; } @@ -1554,7 +1554,7 @@ int gm20b_clk_get_gpcclk_clock_counter(struct clk_gk20a *clk, u64 *val) u32 count1, count2; err = gk20a_busy(g); - if (err) { + if (err != 0) { return err; } diff --git a/drivers/gpu/nvgpu/gm20b/fifo_gm20b.c b/drivers/gpu/nvgpu/gm20b/fifo_gm20b.c index 986feff0d..e9df8038d 100644 --- a/drivers/gpu/nvgpu/gm20b/fifo_gm20b.c +++ b/drivers/gpu/nvgpu/gm20b/fifo_gm20b.c @@ -122,7 +122,7 @@ void gm20b_fifo_trigger_mmu_fault(struct gk20a *g, delay = min_t(u32, delay << 1, GR_IDLE_CHECK_MAX); } while (nvgpu_timeout_expired(&timeout) == 0); - if (ret) { + if (ret != 0) { nvgpu_err(g, "mmu fault timeout"); } diff --git a/drivers/gpu/nvgpu/gm20b/gr_gm20b.c b/drivers/gpu/nvgpu/gm20b/gr_gm20b.c index aa492e327..481e9a00b 100644 --- a/drivers/gpu/nvgpu/gm20b/gr_gm20b.c +++ b/drivers/gpu/nvgpu/gm20b/gr_gm20b.c @@ -691,7 +691,7 @@ int gr_gm20b_init_fs_state(struct gk20a *g) nvgpu_log_fn(g, " "); err = gr_gk20a_init_fs_state(g); - if (err) { + if (err != 0) { return err; } @@ -782,7 +782,7 @@ static void gr_gm20b_load_gpccs_with_bootloader(struct gk20a *g) int gr_gm20b_load_ctxsw_ucode(struct gk20a *g) { - u32 err; + int err; u32 reg_offset = gr_gpcs_gpccs_falcon_hwcfg_r() - gr_fecs_falcon_hwcfg_r(); u8 falcon_id_mask = 0; @@ -817,7 +817,7 @@ int gr_gm20b_load_ctxsw_ucode(struct gk20a *g) (1 << LSF_FALCON_ID_GPCCS)); } } - if (err) { + if (err != 0) { nvgpu_err(g, "Unable to recover GR falcon"); return err; } @@ -846,7 +846,7 @@ int gr_gm20b_load_ctxsw_ucode(struct gk20a *g) err = g->ops.pmu.load_lsfalcon_ucode(g, falcon_id_mask); } - if (err) { + if (err != 0) { nvgpu_err(g, "Unable to boot GPCCS"); return err; } @@ -902,7 +902,7 @@ int gr_gm20b_alloc_gr_ctx(struct gk20a *g, nvgpu_log_fn(g, " "); err = gr_gk20a_alloc_gr_ctx(g, gr_ctx, vm, class, flags); - if (err) { + if (err != 0) { return err; } @@ -1393,7 +1393,7 @@ int gm20b_gr_clear_sm_error_state(struct gk20a *g, memset(&tsg->sm_error_states[sm_id], 0, sizeof(*tsg->sm_error_states)); err = gr_gk20a_disable_ctxsw(g); - if (err) { + if (err != 0) { nvgpu_err(g, "unable to stop gr ctxsw"); goto fail; }