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gpu: nvgpu: linux: vgpu to use dt_node for tegra_gr_comm

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For PCIE gpu device, it uses PCIE controller dt node to store nvgpu/vgpu
dt properties, since PCIE endpoint device does not have any
corresponding dt node. So we pass dt_node directly to tegra_gr_comm,
together with EP device since tegra_gr_comm relies on dev_err.

Jira GVSCI-15779

Change-Id: I73c5210e2d8b6a728c74823c1e62fed765776365
Signed-off-by: Richard Zhao <rizhao@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2884176
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Austin Tajiri <atajiri@nvidia.com>
Reviewed-by: Santosh BS <santoshb@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
This commit is contained in:
Richard Zhao
2023-04-03 15:19:29 -07:00
committed by mobile promotions
parent 03da61c9ce
commit 8a411096c9
1 changed files with 5 additions and 3 deletions
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8
drivers/gpu/nvgpu/os/linux/vgpu/vgpu_ivc.c
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@@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2018, NVIDIA Corporation. All rights reserved. * Copyright (c) 2018-2023, NVIDIA Corporation. All rights reserved.
* *
* This program is free software; you can redistribute it and/or modify it * This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License, * under the terms and conditions of the GNU General Public License,
@@ -18,13 +18,15 @@
#include <linux/tegra_gr_comm.h> #include <linux/tegra_gr_comm.h>
#include "os/linux/os_linux.h" #include "os/linux/os_linux.h"
#include "os/linux/module.h"
int vgpu_ivc_init(struct gk20a *g, u32 elems, int vgpu_ivc_init(struct gk20a *g, u32 elems,
const size_t *queue_sizes, u32 queue_start, u32 num_queues) const size_t *queue_sizes, u32 queue_start, u32 num_queues)
{ {
struct platform_device *pdev = to_platform_device(dev_from_gk20a(g)); struct device *dev = dev_from_gk20a(g);
return tegra_gr_comm_init(pdev, elems, queue_sizes, queue_start, return tegra_gr_comm_init(dev, nvgpu_get_node(g), elems,
queue_sizes, queue_start,
num_queues); num_queues);
} }