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gpu: nvgpu: linux: vgpu to use dt_node for tegra_gr_comm
For PCIE gpu device, it uses PCIE controller dt node to store nvgpu/vgpu dt properties, since PCIE endpoint device does not have any corresponding dt node. So we pass dt_node directly to tegra_gr_comm, together with EP device since tegra_gr_comm relies on dev_err. Jira GVSCI-15779 Change-Id: I73c5210e2d8b6a728c74823c1e62fed765776365 Signed-off-by: Richard Zhao <rizhao@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2884176 Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com> Reviewed-by: Austin Tajiri <atajiri@nvidia.com> Reviewed-by: Santosh BS <santoshb@nvidia.com> Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com> GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
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@@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2018, NVIDIA Corporation. All rights reserved.
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* Copyright (c) 2018-2023, NVIDIA Corporation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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@@ -18,13 +18,15 @@
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#include <linux/tegra_gr_comm.h>
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#include "os/linux/os_linux.h"
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#include "os/linux/module.h"
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int vgpu_ivc_init(struct gk20a *g, u32 elems,
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const size_t *queue_sizes, u32 queue_start, u32 num_queues)
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{
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struct platform_device *pdev = to_platform_device(dev_from_gk20a(g));
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struct device *dev = dev_from_gk20a(g);
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return tegra_gr_comm_init(pdev, elems, queue_sizes, queue_start,
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return tegra_gr_comm_init(dev, nvgpu_get_node(g), elems,
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queue_sizes, queue_start,
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num_queues);
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}
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