From 8a57a9d8f16b7a567808f48a78ed3c119144d0f9 Mon Sep 17 00:00:00 2001 From: Seshendra Gadagottu Date: Thu, 2 May 2019 16:12:40 -0700 Subject: [PATCH] gpu: nvgpu: fix MISRA 15.7 errors in gr falcon Fixed issues related to no non-empty terminating "else" statement. JIRA NVGPU-3226 Change-Id: Iebb21ab0352bbdb02c44629f9cc7d06c75c11ab2 Signed-off-by: Seshendra Gadagottu Reviewed-on: https://git-master.nvidia.com/r/2110733 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Vinod Gopalakrishnakurup Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/hal/gr/falcon/gr_falcon_gm20b.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/gpu/nvgpu/hal/gr/falcon/gr_falcon_gm20b.c b/drivers/gpu/nvgpu/hal/gr/falcon/gr_falcon_gm20b.c index 9edf758c8..934a9254f 100644 --- a/drivers/gpu/nvgpu/hal/gr/falcon/gr_falcon_gm20b.c +++ b/drivers/gpu/nvgpu/hal/gr/falcon/gr_falcon_gm20b.c @@ -607,6 +607,8 @@ static int gm20b_gr_falcon_ctx_wait_ucode(struct gk20a *g, u32 mailbox_id, mailbox_id, reg); g->ops.gr.falcon.dump_stats(g); return -1; + } else { + nvgpu_log_info(g, "fecs mailbox return success"); } nvgpu_log_fn(g, "done"); @@ -1006,6 +1008,8 @@ u32 gm20b_gr_falcon_fecs_host_intr_status(struct gk20a *g, } else if ((gr_fecs_intr & gr_fecs_host_int_status_fault_during_ctxsw_f(1)) != 0U) { fecs_host_intr->fault_during_ctxsw_active = true; + } else { + nvgpu_log_info(g, "un-handled fecs intr: 0x%x", gr_fecs_intr); } return gr_fecs_intr;