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gpu: nvgpu: fix misra errors in gr unit
Fix few misra 4.7 and misra 14.3 violations in gr units. misra_c_2012_rule_14_3_violation: The condition "compute_preempt_mode != 0U" must be true. Fix misra_c_2012_directive_4_7_violation using following functions nvgpu_gr_global_ctx_buffer_sys_alloc nvgpu_gr_setup_validate_channel_and_class gr_gv11b_ecc_scrub_is_done Jira NVGPU-4054 Change-Id: I64ba6fb29d202abbe12a38b94f6080f63c070db9 Signed-off-by: Vinod G <vinodg@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/2196596 Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com> Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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@@ -147,7 +147,8 @@ int nvgpu_gr_setup_alloc_obj_ctx(struct nvgpu_channel *c, u32 class_num,
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nvgpu_log_fn(g, " ");
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if (nvgpu_gr_setup_validate_channel_and_class(g, c, class_num) != 0) {
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err = nvgpu_gr_setup_validate_channel_and_class(g, c, class_num);
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if (err != 0) {
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goto out;
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}
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