From 8ab5e07d8f34be040d196bc2e87e8dcee59cdd7c Mon Sep 17 00:00:00 2001 From: vinodg Date: Tue, 17 Dec 2019 17:10:34 -0800 Subject: [PATCH] gpu: nvgpu: Update for gr config code coverage. Replace if statement with nvgpu_assert,this checking is just to assure following division will not cause system crash. Jira NVGPU-4531 Change-Id: I213882b56ccfd993066c58bc3fb6c47a6fd92d4a Signed-off-by: vinodg Reviewed-on: https://git-master.nvidia.com/r/2264410 Reviewed-by: svc-mobile-coverity Reviewed-by: svc-mobile-misra Reviewed-by: svc-mobile-cert Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Alex Waterman Reviewed-by: Deepak Nibade GVS: Gerrit_Virtual_Submit Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/hal/gr/config/gr_config_gv100_fusa.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/nvgpu/hal/gr/config/gr_config_gv100_fusa.c b/drivers/gpu/nvgpu/hal/gr/config/gr_config_gv100_fusa.c index a998cb937..0dcb85765 100644 --- a/drivers/gpu/nvgpu/hal/gr/config/gr_config_gv100_fusa.c +++ b/drivers/gpu/nvgpu/hal/gr/config/gr_config_gv100_fusa.c @@ -198,10 +198,10 @@ static int gr_gr100_find_perf_reduction_rate_gpc(struct gk20a *g, * ratio represents relative throughput of the GPC */ tpc_cnt = nvgpu_gr_config_get_gpc_tpc_count(gr_config, gpc_id); - if (tpc_cnt > 0U) { - scg_gpc_pix_perf = nvgpu_safe_mult_u32(scale_factor, + nvgpu_assert(tpc_cnt != 0U); + + scg_gpc_pix_perf = nvgpu_safe_mult_u32(scale_factor, num_tpc_gpc[gpc_id]) / tpc_cnt; - } if (*min_scg_gpc_pix_perf > scg_gpc_pix_perf) { *min_scg_gpc_pix_perf = scg_gpc_pix_perf;