From 8ac6724c09a0b94b14fa30f84105e83da5932c1f Mon Sep 17 00:00:00 2001 From: Scott Long Date: Tue, 30 Oct 2018 21:06:55 -0700 Subject: [PATCH] gpu: nvgpu: MISRA 21.15 fixes to clk code MISRA Rule 21.15 prohibits use of memcpy() with incompatible ptrs to qualified/unqualified types. To circumvent this issue we've introduced a new MISRA-compliant nvgpu_memcpy() function. This change switches all offending uses of memcpy() in clk/* and gp106/mclk* over to use nvgpu_memcpy() with appropriate casts applied. JIRA NVGPU-849 Change-Id: I21d3a8bed762adad64abf0b0bfc58d743a104cbb Signed-off-by: Scott Long Reviewed-on: https://git-master.nvidia.com/r/1939866 Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/clk/clk_prog.c | 14 ++++++++------ drivers/gpu/nvgpu/gp106/mclk_gp106.c | 5 +++-- 2 files changed, 11 insertions(+), 8 deletions(-) diff --git a/drivers/gpu/nvgpu/clk/clk_prog.c b/drivers/gpu/nvgpu/clk/clk_prog.c index adcecc494..7e17acb28 100644 --- a/drivers/gpu/nvgpu/clk/clk_prog.c +++ b/drivers/gpu/nvgpu/clk/clk_prog.c @@ -205,7 +205,7 @@ static int devinit_get_clk_prog_table_35(struct gk20a *g, goto done; } - memcpy(&header, clkprogs_tbl_ptr, hszfmt); + nvgpu_memcpy((u8 *)&header, clkprogs_tbl_ptr, hszfmt); if (header.header_size < hszfmt) { status = -EINVAL; goto done; @@ -254,7 +254,7 @@ static int devinit_get_clk_prog_table_35(struct gk20a *g, (header.vf_entry_count * vfszfmt) + (header.vf_sec_entry_count * vfsecszfmt))); - memcpy(&prog, entry, szfmt); + nvgpu_memcpy((u8 *)&prog, entry, szfmt); memset(vfentries, 0xFF, sizeof(struct ctrl_clk_clk_prog_1x_master_vf_entry) * CTRL_CLK_CLK_PROG_1X_MASTER_VF_ENTRY_MAX_ENTRIES); @@ -328,14 +328,15 @@ static int devinit_get_clk_prog_table_35(struct gk20a *g, case NV_VBIOS_CLOCK_PROGRAMMING_TABLE_1X_ENTRY_FLAGS0_TYPE_MASTER_TABLE: prog_data.v35_master.master.b_o_c_o_v_enabled = false; for (j = 0; j < header.vf_entry_count; j++) { - memcpy(&vfprog, vfentry, vfszfmt); + nvgpu_memcpy((u8 *)&vfprog, vfentry, vfszfmt); vfentries[j].vfe_idx = (u8)vfprog.vfe_idx; vfentries[j].gain_vfe_idx = CTRL_BOARDOBJ_IDX_INVALID; vfentry += vfszfmt; for (k = 0; k < header.vf_sec_entry_count; k++) { - memcpy(&vfsecprog, vfsecentry, vfsecszfmt); + nvgpu_memcpy((u8 *)&vfsecprog, + vfsecentry, vfsecszfmt); voltrailsecvfentries[j].sec_vf_entries[k].vfe_idx = (u8)vfsecprog.sec_vfe_idx; if (prog_data.v1x.source == CTRL_CLK_PROG_1X_SOURCE_FLL) { @@ -356,7 +357,8 @@ static int devinit_get_clk_prog_table_35(struct gk20a *g, prog_data.v35_master.p_voltrail_sec_vf_entries = voltrailsecvfentries; for (j = 0; j < header.slave_entry_count; j++) { - memcpy(&slaveprog, slaveentry, slaveszfmt); + nvgpu_memcpy((u8 *)&slaveprog, slaveentry, + slaveszfmt); if (prog_type == NV_VBIOS_CLOCK_PROGRAMMING_TABLE_1X_ENTRY_FLAGS0_TYPE_MASTER_RATIO) { ratioslaveentries[j].clk_dom_idx = (u8)slaveprog.clk_dom_idx; @@ -647,7 +649,7 @@ static int devinit_get_clk_prog_table(struct gk20a *g, if (clkprogs_tbl_ptr == NULL) { return -EINVAL; } - memcpy(&header, clkprogs_tbl_ptr, + nvgpu_memcpy((u8 *)&header, clkprogs_tbl_ptr, VBIOS_CLOCK_PROGRAMMING_TABLE_1X_HEADER_SIZE_08); switch (header.version) { diff --git a/drivers/gpu/nvgpu/gp106/mclk_gp106.c b/drivers/gpu/nvgpu/gp106/mclk_gp106.c index a3e482ebb..4bdb680ec 100644 --- a/drivers/gpu/nvgpu/gp106/mclk_gp106.c +++ b/drivers/gpu/nvgpu/gp106/mclk_gp106.c @@ -27,6 +27,7 @@ #include #include #include +#include #ifdef CONFIG_DEBUG_FS #include @@ -3075,7 +3076,7 @@ static int mclk_get_memclk_table(struct gk20a *g) goto done; } - memcpy(&memclock_table_header, mem_table_ptr, + nvgpu_memcpy((u8 *)&memclock_table_header, mem_table_ptr, sizeof(memclock_table_header)); if ((memclock_table_header.version < @@ -3099,7 +3100,7 @@ static int mclk_get_memclk_table(struct gk20a *g) u8 script_index, cmd_script_index; u32 script_ptr = 0, cmd_script_ptr = 0; - memcpy(&memclock_base_entry, mem_entry_ptr, + nvgpu_memcpy((u8 *)&memclock_base_entry, mem_entry_ptr, memclock_table_header.base_entry_size); if (memclock_base_entry.maximum == 0) { continue;