From 8b34e4c6a8c2e8d162833e943f67ff072b0b7ecb Mon Sep 17 00:00:00 2001 From: Seema Khowala Date: Thu, 13 Oct 2016 15:17:01 -0700 Subject: [PATCH] gpu: nvgpu: gv11b: header update for CL#37320141 Hardware header updates for CL#37320141 JIRA GV11B-27 JIRA GV11B-7 JIRA GV11B-8 JIRA GV11B-9 Change-Id: I54d467f42d4074d1d9ae912f6d46ab2e323f69bc Signed-off-by: Seema Khowala Reviewed-on: http://git-master/r/1236263 GVS: Gerrit_Virtual_Submit Reviewed-by: Seshendra Gadagottu Reviewed-by: Terje Bergstrom --- drivers/gpu/nvgpu/gv11b/hw_gmmu_gv11b.h | 2 +- drivers/gpu/nvgpu/gv11b/hw_gr_gv11b.h | 96 ++++--------------------- drivers/gpu/nvgpu/gv11b/hw_ltc_gv11b.h | 20 ++++++ drivers/gpu/nvgpu/gv11b/hw_mc_gv11b.h | 4 ++ drivers/gpu/nvgpu/gv11b/hw_ram_gv11b.h | 16 ++--- 5 files changed, 47 insertions(+), 91 deletions(-) diff --git a/drivers/gpu/nvgpu/gv11b/hw_gmmu_gv11b.h b/drivers/gpu/nvgpu/gv11b/hw_gmmu_gv11b.h index 8c3242250..f5e146c49 100644 --- a/drivers/gpu/nvgpu/gv11b/hw_gmmu_gv11b.h +++ b/drivers/gpu/nvgpu/gv11b/hw_gmmu_gv11b.h @@ -1182,7 +1182,7 @@ static inline u32 gmmu_pte_kind_c64_ms2_2cbr_v(void) { return 0x000000ec; } -static inline u32 gmmu_pte_kind_c64_ms2_2cbra_v(void) +static inline u32 gmmu_pte_kind_c64_ms2_4cbra_v(void) { return 0x000000cd; } diff --git a/drivers/gpu/nvgpu/gv11b/hw_gr_gv11b.h b/drivers/gpu/nvgpu/gv11b/hw_gr_gv11b.h index c58ee6ba4..a5e93058c 100644 --- a/drivers/gpu/nvgpu/gv11b/hw_gr_gv11b.h +++ b/drivers/gpu/nvgpu/gv11b/hw_gr_gv11b.h @@ -2676,7 +2676,7 @@ static inline u32 gr_gpcs_swdx_dss_zbc_color_a_val_f(u32 v) } static inline u32 gr_gpcs_swdx_dss_zbc_c_01_to_04_format_r(void) { - return 0x00500100; + return 0x00418100; } static inline u32 gr_gpcs_swdx_dss_zbc_z_r(u32 i) { @@ -2688,7 +2688,19 @@ static inline u32 gr_gpcs_swdx_dss_zbc_z_val_f(u32 v) } static inline u32 gr_gpcs_swdx_dss_zbc_z_01_to_04_format_r(void) { - return 0x0050014c; + return 0x0041814c; +} +static inline u32 gr_gpcs_swdx_dss_zbc_s_r(u32 i) +{ + return 0x0041815c + i*4; +} +static inline u32 gr_gpcs_swdx_dss_zbc_s_val_f(u32 v) +{ + return (v & 0xff) << 0; +} +static inline u32 gr_gpcs_swdx_dss_zbc_s_01_to_04_format_r(void) +{ + return 0x00418198; } static inline u32 gr_gpcs_setup_attrib_cb_base_r(void) { @@ -3114,14 +3126,6 @@ static inline u32 gr_gpc0_tpc0_sm0_hww_global_esr_multiple_warp_errors_pending_f { return 0x4; } -static inline u32 gr_gpc0_tpc0_tex_m_hww_esr_r(void) -{ - return 0x00504224; -} -static inline u32 gr_gpc0_tpc0_tex_m_hww_esr_intr_pending_f(void) -{ - return 0x1; -} static inline u32 gr_gpc0_tpc0_sm0_hww_warp_esr_r(void) { return 0x00504730; @@ -3294,78 +3298,6 @@ static inline u32 gr_zcull_subregion_qty_v(void) { return 0x00000010; } -static inline u32 gr_pri_gpc0_tpc0_sm_dsm_perf_counter_control_sel0_r(void) -{ - return 0x00504308; -} -static inline u32 gr_pri_gpc0_tpc0_sm_dsm_perf_counter_control_sel1_r(void) -{ - return 0x0050430c; -} -static inline u32 gr_pri_gpc0_tpc0_sm_dsm_perf_counter_control0_r(void) -{ - return 0x00504318; -} -static inline u32 gr_pri_gpc0_tpc0_sm_dsm_perf_counter_control1_r(void) -{ - return 0x00504320; -} -static inline u32 gr_pri_gpc0_tpc0_sm_dsm_perf_counter_control2_r(void) -{ - return 0x00504324; -} -static inline u32 gr_pri_gpc0_tpc0_sm_dsm_perf_counter_control3_r(void) -{ - return 0x00504328; -} -static inline u32 gr_pri_gpc0_tpc0_sm_dsm_perf_counter_control4_r(void) -{ - return 0x0050432c; -} -static inline u32 gr_pri_gpc0_tpc0_sm_dsm_perf_counter_control5_r(void) -{ - return 0x0050431c; -} -static inline u32 gr_pri_gpc0_tpc0_sm_dsm_perf_counter0_control_r(void) -{ - return 0x00504378; -} -static inline u32 gr_pri_gpc0_tpc0_sm_dsm_perf_counter1_control_r(void) -{ - return 0x0050437c; -} -static inline u32 gr_pri_gpc0_tpc0_sm_dsm_perf_counter2_control_r(void) -{ - return 0x00504380; -} -static inline u32 gr_pri_gpc0_tpc0_sm_dsm_perf_counter3_control_r(void) -{ - return 0x00504384; -} -static inline u32 gr_pri_gpc0_tpc0_sm_dsm_perf_counter4_control_r(void) -{ - return 0x00504388; -} -static inline u32 gr_pri_gpc0_tpc0_sm_dsm_perf_counter5_control_r(void) -{ - return 0x0050438c; -} -static inline u32 gr_pri_gpc0_tpc0_sm_dsm_perf_counter6_control_r(void) -{ - return 0x00504390; -} -static inline u32 gr_pri_gpc0_tpc0_sm_dsm_perf_counter7_control_r(void) -{ - return 0x00504394; -} -static inline u32 gr_pri_gpc0_tpc0_sm0_dsm_perf_counter_status_s1_r(void) -{ - return 0x00504744; -} -static inline u32 gr_pri_gpc0_tpc0_sm0_dsm_perf_counter_status1_r(void) -{ - return 0x00504750; -} static inline u32 gr_fe_pwr_mode_r(void) { return 0x00404170; diff --git a/drivers/gpu/nvgpu/gv11b/hw_ltc_gv11b.h b/drivers/gpu/nvgpu/gv11b/hw_ltc_gv11b.h index 4c10852e0..6968c699a 100644 --- a/drivers/gpu/nvgpu/gv11b/hw_ltc_gv11b.h +++ b/drivers/gpu/nvgpu/gv11b/hw_ltc_gv11b.h @@ -246,6 +246,26 @@ static inline u32 ltc_ltcs_ltss_dstg_zbc_depth_clear_value_field_v(u32 r) { return (r >> 0) & 0xffffffff; } +static inline u32 ltc_ltcs_ltss_dstg_zbc_stencil_clear_value_r(void) +{ + return 0x0017e204; +} +static inline u32 ltc_ltcs_ltss_dstg_zbc_stencil_clear_value_field_s(void) +{ + return 8; +} +static inline u32 ltc_ltcs_ltss_dstg_zbc_stencil_clear_value_field_f(u32 v) +{ + return (v & 0xff) << 0; +} +static inline u32 ltc_ltcs_ltss_dstg_zbc_stencil_clear_value_field_m(void) +{ + return 0xff << 0; +} +static inline u32 ltc_ltcs_ltss_dstg_zbc_stencil_clear_value_field_v(u32 r) +{ + return (r >> 0) & 0xff; +} static inline u32 ltc_ltcs_ltss_tstg_set_mgmt_2_r(void) { return 0x0017e2b0; diff --git a/drivers/gpu/nvgpu/gv11b/hw_mc_gv11b.h b/drivers/gpu/nvgpu/gv11b/hw_mc_gv11b.h index 7fe4d158b..98bec43a4 100644 --- a/drivers/gpu/nvgpu/gv11b/hw_mc_gv11b.h +++ b/drivers/gpu/nvgpu/gv11b/hw_mc_gv11b.h @@ -78,6 +78,10 @@ static inline u32 mc_intr_pfifo_pending_f(void) { return 0x100; } +static inline u32 mc_intr_hub_pending_f(void) +{ + return 0x200; +} static inline u32 mc_intr_pgraph_pending_f(void) { return 0x1000; diff --git a/drivers/gpu/nvgpu/gv11b/hw_ram_gv11b.h b/drivers/gpu/nvgpu/gv11b/hw_ram_gv11b.h index 868e4ad90..46772ff4a 100644 --- a/drivers/gpu/nvgpu/gv11b/hw_ram_gv11b.h +++ b/drivers/gpu/nvgpu/gv11b/hw_ram_gv11b.h @@ -498,19 +498,23 @@ static inline u32 ram_fc_acquire_w(void) { return 12; } -static inline u32 ram_fc_semaphorea_w(void) +static inline u32 ram_fc_sem_addr_hi_w(void) { return 14; } -static inline u32 ram_fc_semaphoreb_w(void) +static inline u32 ram_fc_sem_addr_lo_w(void) { return 15; } -static inline u32 ram_fc_semaphorec_w(void) +static inline u32 ram_fc_sem_payload_lo_w(void) { return 16; } -static inline u32 ram_fc_semaphored_w(void) +static inline u32 ram_fc_sem_payload_hi_w(void) +{ + return 39; +} +static inline u32 ram_fc_sem_execute_w(void) { return 17; } @@ -554,10 +558,6 @@ static inline u32 ram_fc_subdevice_w(void) { return 37; } -static inline u32 ram_fc_formats_w(void) -{ - return 39; -} static inline u32 ram_fc_allowed_syncpoints_w(void) { return 58;