diff --git a/drivers/gpu/nvgpu/Makefile.nvgpu b/drivers/gpu/nvgpu/Makefile.nvgpu index 6dbba4d94..6ffbdc445 100644 --- a/drivers/gpu/nvgpu/Makefile.nvgpu +++ b/drivers/gpu/nvgpu/Makefile.nvgpu @@ -43,6 +43,7 @@ nvgpu-y := \ common/linux/thread.o \ common/linux/vm.o \ common/linux/intr.o \ + common/linux/sysfs.o \ common/mm/nvgpu_allocator.o \ common/mm/bitmap_allocator.o \ common/mm/buddy_allocator.o \ @@ -85,7 +86,6 @@ nvgpu-y := \ gk20a/gr_ctx_gk20a_sim.o \ gk20a/gr_ctx_gk20a.o \ gk20a/gk20a_gating_reglist.o \ - gk20a/gk20a_sysfs.o \ gk20a/ltc_gk20a.o \ gk20a/fb_gk20a.o \ gk20a/hal.o \ @@ -186,7 +186,6 @@ nvgpu-y += \ gp10b/cde_gp10b.o \ gp10b/therm_gp10b.o \ gp10b/fecs_trace_gp10b.o \ - gp10b/gp10b_sysfs.o \ gp10b/priv_ring_gp10b.o \ gp10b/gp10b.o \ gp106/hal_gp106.o \ diff --git a/drivers/gpu/nvgpu/common/linux/driver_common.c b/drivers/gpu/nvgpu/common/linux/driver_common.c index c4d40c356..a7bc230c3 100644 --- a/drivers/gpu/nvgpu/common/linux/driver_common.c +++ b/drivers/gpu/nvgpu/common/linux/driver_common.c @@ -28,6 +28,7 @@ #include "gk20a/platform_gk20a.h" #include "module.h" #include "os_linux.h" +#include "sysfs.h" #define EMC3D_DEFAULT_RATIO 750 @@ -190,7 +191,7 @@ int nvgpu_probe(struct gk20a *g, nvgpu_init_mm_vars(g); - gk20a_create_sysfs(g->dev); + nvgpu_create_sysfs(g->dev); gk20a_debug_init(g, debugfs_symlink); g->dbg_regops_tmp_buf = nvgpu_kzalloc(g, SZ_4K); diff --git a/drivers/gpu/nvgpu/common/linux/module.c b/drivers/gpu/nvgpu/common/linux/module.c index bfd2c7906..99bbc25e4 100644 --- a/drivers/gpu/nvgpu/common/linux/module.c +++ b/drivers/gpu/nvgpu/common/linux/module.c @@ -31,8 +31,8 @@ #include #include -#include "gk20a/gk20a.h" #include "gk20a/platform_gk20a.h" +#include "sysfs.h" #include "vgpu/vgpu.h" #include "gk20a/gk20a_scale.h" #include "gk20a/ctxsw_trace_gk20a.h" @@ -985,7 +985,7 @@ static int __exit gk20a_remove(struct platform_device *pdev) gk20a_debug_deinit(g); - gk20a_remove_sysfs(dev); + nvgpu_remove_sysfs(dev); if (platform->secure_buffer.destroy) platform->secure_buffer.destroy(g, diff --git a/drivers/gpu/nvgpu/common/linux/pci.c b/drivers/gpu/nvgpu/common/linux/pci.c index cb315973f..acb1bb9f9 100644 --- a/drivers/gpu/nvgpu/common/linux/pci.c +++ b/drivers/gpu/nvgpu/common/linux/pci.c @@ -29,7 +29,7 @@ #include "module.h" #include "intr.h" #include "gp106/pmu_mclk_gp106.h" - +#include "sysfs.h" #include "pci.h" #include "os_linux.h" @@ -491,7 +491,7 @@ static void nvgpu_pci_remove(struct pci_dev *pdev) debugfs_remove_recursive(platform->debugfs_alias); #endif - gk20a_remove_sysfs(g->dev); + nvgpu_remove_sysfs(g->dev); if (platform->remove) platform->remove(g->dev); diff --git a/drivers/gpu/nvgpu/common/linux/platform_gp10b_tegra.c b/drivers/gpu/nvgpu/common/linux/platform_gp10b_tegra.c index 5980c592d..ab2aa1c52 100644 --- a/drivers/gpu/nvgpu/common/linux/platform_gp10b_tegra.c +++ b/drivers/gpu/nvgpu/common/linux/platform_gp10b_tegra.c @@ -38,7 +38,6 @@ #include "gk20a/gk20a_scale.h" #include "platform_gk20a_tegra.h" -#include "gp10b/gp10b_sysfs.h" #include "gp10b/platform_gp10b.h" #include "platform_gp10b_tegra.h" @@ -161,9 +160,6 @@ static int gp10b_tegra_late_probe(struct device *dev) /* Cause early VPR resize */ gk20a_tegra_secure_page_alloc(dev); - /*Create GP10B specific sysfs*/ - gp10b_create_sysfs(dev); - /* Initialise tegra specific scaling quirks */ gp10b_tegra_scale_init(dev); return 0; @@ -172,8 +168,6 @@ static int gp10b_tegra_late_probe(struct device *dev) int gp10b_tegra_remove(struct device *dev) { gr_gp10b_remove_sysfs(dev); - /*Remove GP10B specific sysfs*/ - gp10b_remove_sysfs(dev); /* deinitialise tegra specific scaling quirks */ gp10b_tegra_scale_exit(dev); diff --git a/drivers/gpu/nvgpu/gk20a/gk20a_sysfs.c b/drivers/gpu/nvgpu/common/linux/sysfs.c similarity index 87% rename from drivers/gpu/nvgpu/gk20a/gk20a_sysfs.c rename to drivers/gpu/nvgpu/common/linux/sysfs.c index 1933eed52..e0da4661f 100644 --- a/drivers/gpu/nvgpu/gk20a/gk20a_sysfs.c +++ b/drivers/gpu/nvgpu/common/linux/sysfs.c @@ -1,8 +1,4 @@ /* - * drivers/video/tegra/host/gk20a/gk20a_sysfs.c - * - * GK20A Graphics - * * Copyright (c) 2011-2017, NVIDIA CORPORATION. All rights reserved. * * This program is free software; you can redistribute it and/or modify it @@ -22,18 +18,15 @@ #include #include #include -#if (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 4, 0)) #include -#endif #include #include -#include "gk20a.h" +#include "sysfs.h" #include "gk20a/platform_gk20a.h" -#include "gr_gk20a.h" -#include "fifo_gk20a.h" -#include "pmu_gk20a.h" +#include "gk20a/pmu_gk20a.h" +#include "gk20a/gr_gk20a.h" #define PTIMER_FP_FACTOR 1000000 @@ -63,7 +56,7 @@ static ssize_t elcg_enable_store(struct device *dev, gk20a_idle(g); - dev_info(dev, "ELCG is %s.\n", g->elcg_enabled ? "enabled" : + nvgpu_info(g, "ELCG is %s.", g->elcg_enabled ? "enabled" : "disabled"); return count; @@ -99,28 +92,35 @@ static ssize_t blcg_enable_store(struct device *dev, return err; if (g->ops.clock_gating.blcg_bus_load_gating_prod) - g->ops.clock_gating.blcg_bus_load_gating_prod(g, g->blcg_enabled); + g->ops.clock_gating.blcg_bus_load_gating_prod(g, + g->blcg_enabled); if (g->ops.clock_gating.blcg_ce_load_gating_prod) g->ops.clock_gating.blcg_ce_load_gating_prod(g, - g->blcg_enabled); + g->blcg_enabled); if (g->ops.clock_gating.blcg_ctxsw_firmware_load_gating_prod) - g->ops.clock_gating.blcg_ctxsw_firmware_load_gating_prod(g, g->blcg_enabled); + g->ops.clock_gating.blcg_ctxsw_firmware_load_gating_prod(g, + g->blcg_enabled); if (g->ops.clock_gating.blcg_fb_load_gating_prod) - g->ops.clock_gating.blcg_fb_load_gating_prod(g, g->blcg_enabled); + g->ops.clock_gating.blcg_fb_load_gating_prod(g, + g->blcg_enabled); if (g->ops.clock_gating.blcg_fifo_load_gating_prod) - g->ops.clock_gating.blcg_fifo_load_gating_prod(g, g->blcg_enabled); + g->ops.clock_gating.blcg_fifo_load_gating_prod(g, + g->blcg_enabled); if (g->ops.clock_gating.blcg_gr_load_gating_prod) - g->ops.clock_gating.blcg_gr_load_gating_prod(g, g->blcg_enabled); + g->ops.clock_gating.blcg_gr_load_gating_prod(g, + g->blcg_enabled); if (g->ops.clock_gating.blcg_ltc_load_gating_prod) - g->ops.clock_gating.blcg_ltc_load_gating_prod(g, g->blcg_enabled); + g->ops.clock_gating.blcg_ltc_load_gating_prod(g, + g->blcg_enabled); if (g->ops.clock_gating.blcg_pmu_load_gating_prod) - g->ops.clock_gating.blcg_pmu_load_gating_prod(g, g->blcg_enabled); + g->ops.clock_gating.blcg_pmu_load_gating_prod(g, + g->blcg_enabled); if (g->ops.clock_gating.blcg_xbar_load_gating_prod) g->ops.clock_gating.blcg_xbar_load_gating_prod(g, - g->blcg_enabled); + g->blcg_enabled); gk20a_idle(g); - dev_info(dev, "BLCG is %s.\n", g->blcg_enabled ? "enabled" : + nvgpu_info(g, "BLCG is %s.", g->blcg_enabled ? "enabled" : "disabled"); return count; @@ -162,32 +162,44 @@ static ssize_t slcg_enable_store(struct device *dev, return err; if (g->ops.clock_gating.slcg_bus_load_gating_prod) - g->ops.clock_gating.slcg_bus_load_gating_prod(g, g->slcg_enabled); + g->ops.clock_gating.slcg_bus_load_gating_prod(g, + g->slcg_enabled); if (g->ops.clock_gating.slcg_ce2_load_gating_prod) - g->ops.clock_gating.slcg_ce2_load_gating_prod(g, g->slcg_enabled); + g->ops.clock_gating.slcg_ce2_load_gating_prod(g, + g->slcg_enabled); if (g->ops.clock_gating.slcg_chiplet_load_gating_prod) - g->ops.clock_gating.slcg_chiplet_load_gating_prod(g, g->slcg_enabled); + g->ops.clock_gating.slcg_chiplet_load_gating_prod(g, + g->slcg_enabled); if (g->ops.clock_gating.slcg_ctxsw_firmware_load_gating_prod) - g->ops.clock_gating.slcg_ctxsw_firmware_load_gating_prod(g, g->slcg_enabled); + g->ops.clock_gating.slcg_ctxsw_firmware_load_gating_prod(g, + g->slcg_enabled); if (g->ops.clock_gating.slcg_fb_load_gating_prod) - g->ops.clock_gating.slcg_fb_load_gating_prod(g, g->slcg_enabled); + g->ops.clock_gating.slcg_fb_load_gating_prod(g, + g->slcg_enabled); if (g->ops.clock_gating.slcg_fifo_load_gating_prod) - g->ops.clock_gating.slcg_fifo_load_gating_prod(g, g->slcg_enabled); + g->ops.clock_gating.slcg_fifo_load_gating_prod(g, + g->slcg_enabled); if (g->ops.clock_gating.slcg_gr_load_gating_prod) - g->ops.clock_gating.slcg_gr_load_gating_prod(g, g->slcg_enabled); + g->ops.clock_gating.slcg_gr_load_gating_prod(g, + g->slcg_enabled); if (g->ops.clock_gating.slcg_ltc_load_gating_prod) - g->ops.clock_gating.slcg_ltc_load_gating_prod(g, g->slcg_enabled); + g->ops.clock_gating.slcg_ltc_load_gating_prod(g, + g->slcg_enabled); if (g->ops.clock_gating.slcg_perf_load_gating_prod) - g->ops.clock_gating.slcg_perf_load_gating_prod(g, g->slcg_enabled); + g->ops.clock_gating.slcg_perf_load_gating_prod(g, + g->slcg_enabled); if (g->ops.clock_gating.slcg_priring_load_gating_prod) - g->ops.clock_gating.slcg_priring_load_gating_prod(g, g->slcg_enabled); + g->ops.clock_gating.slcg_priring_load_gating_prod(g, + g->slcg_enabled); if (g->ops.clock_gating.slcg_pmu_load_gating_prod) - g->ops.clock_gating.slcg_pmu_load_gating_prod(g, g->slcg_enabled); + g->ops.clock_gating.slcg_pmu_load_gating_prod(g, + g->slcg_enabled); if (g->ops.clock_gating.slcg_xbar_load_gating_prod) - g->ops.clock_gating.slcg_xbar_load_gating_prod(g, g->slcg_enabled); + g->ops.clock_gating.slcg_xbar_load_gating_prod(g, + g->slcg_enabled); gk20a_idle(g); - dev_info(dev, "SLCG is %s.\n", g->slcg_enabled ? "enabled" : + nvgpu_info(g, "SLCG is %s.", g->slcg_enabled ? "enabled" : "disabled"); return count; @@ -207,13 +219,14 @@ static ssize_t ptimer_scale_factor_show(struct device *dev, struct device_attribute *attr, char *buf) { + struct gk20a *g = get_gk20a(dev); struct gk20a_platform *platform = dev_get_drvdata(dev); u32 src_freq_hz = platform->ptimer_src_freq; u32 scaling_factor_fp; ssize_t res; if (!src_freq_hz) { - dev_err(dev, "reference clk_m rate is not set correctly\n"); + nvgpu_err(g, "reference clk_m rate is not set correctly"); return -EINVAL; } @@ -239,12 +252,13 @@ static ssize_t ptimer_ref_freq_show(struct device *dev, struct device_attribute *attr, char *buf) { + struct gk20a *g = get_gk20a(dev); struct gk20a_platform *platform = dev_get_drvdata(dev); u32 src_freq_hz = platform->ptimer_src_freq; ssize_t res; if (!src_freq_hz) { - dev_err(dev, "reference clk_m rate is not set correctly\n"); + nvgpu_err(g, "reference clk_m rate is not set correctly"); return -EINVAL; } @@ -263,12 +277,13 @@ static ssize_t ptimer_src_freq_show(struct device *dev, struct device_attribute *attr, char *buf) { + struct gk20a *g = get_gk20a(dev); struct gk20a_platform *platform = dev_get_drvdata(dev); u32 src_freq_hz = platform->ptimer_src_freq; ssize_t res; if (!src_freq_hz) { - dev_err(dev, "reference clk_m rate is not set correctly\n"); + nvgpu_err(g, "reference clk_m rate is not set correctly"); return -EINVAL; } @@ -310,7 +325,7 @@ static ssize_t railgate_enable_store(struct device *dev, g->user_railgate_disabled = true; } - dev_info(dev, "railgate is %s.\n", g->can_railgate ? + nvgpu_info(g, "railgate is %s.", g->can_railgate ? "enabled" : "disabled"); return count; @@ -337,7 +352,7 @@ static ssize_t railgate_delay_store(struct device *dev, int err; if (!g->can_railgate) { - dev_info(dev, "does not support power-gating\n"); + nvgpu_info(g, "does not support power-gating"); return count; } @@ -346,7 +361,7 @@ static ssize_t railgate_delay_store(struct device *dev, g->railgate_delay = railgate_delay; pm_runtime_set_autosuspend_delay(dev, g->railgate_delay); } else - dev_err(dev, "Invalid powergate delay\n"); + nvgpu_err(g, "Invalid powergate delay"); /* wake-up system to make rail-gating delay effective immediately */ err = gk20a_busy(g); @@ -471,7 +486,7 @@ static ssize_t elpg_enable_store(struct device *dev, } gk20a_idle(g); } - dev_info(dev, "ELPG is %s.\n", g->elpg_enabled ? "enabled" : + nvgpu_info(g, "ELPG is %s.", g->elpg_enabled ? "enabled" : "disabled"); return count; @@ -535,7 +550,7 @@ static ssize_t mscg_enable_store(struct device *dev, } gk20a_idle(g); } - dev_info(dev, "MSCG is %s.\n", g->mscg_enabled ? "enabled" : + nvgpu_info(g, "MSCG is %s.", g->mscg_enabled ? "enabled" : "disabled"); return count; @@ -638,11 +653,11 @@ static ssize_t aelpg_enable_store(struct device *dev, status = nvgpu_pmu_ap_send_command(g, &ap_cmd, false); } } else { - dev_info(dev, "PMU is not ready, AELPG request failed\n"); + nvgpu_info(g, "PMU is not ready, AELPG request failed"); } gk20a_idle(g); - dev_info(dev, "AELPG is %s.\n", g->aelpg_enabled ? "enabled" : + nvgpu_info(g, "AELPG is %s.", g->aelpg_enabled ? "enabled" : "disabled"); return count; @@ -744,7 +759,7 @@ static ssize_t force_idle_store(struct device *dev, err = __gk20a_do_idle(g, false); if (!err) { g->forced_idle = 1; - dev_info(dev, "gpu is idle : %d\n", + nvgpu_info(g, "gpu is idle : %d", g->forced_idle); } } @@ -755,7 +770,7 @@ static ssize_t force_idle_store(struct device *dev, err = __gk20a_do_unidle(g); if (!err) { g->forced_idle = 0; - dev_info(dev, "gpu is idle : %d\n", + nvgpu_info(g, "gpu is idle : %d", g->forced_idle); } } @@ -886,8 +901,35 @@ static ssize_t max_timeslice_us_store(struct device *dev, static DEVICE_ATTR(max_timeslice_us, ROOTRW, max_timeslice_us_read, max_timeslice_us_store); +static ssize_t czf_bypass_store(struct device *dev, + struct device_attribute *attr, const char *buf, size_t count) +{ + struct gk20a *g = get_gk20a(dev); + unsigned long val; -void gk20a_remove_sysfs(struct device *dev) + if (kstrtoul(buf, 10, &val) < 0) + return -EINVAL; + + if (val >= 4) + return -EINVAL; + + g->gr.czf_bypass = val; + + return count; +} + +static ssize_t czf_bypass_read(struct device *dev, + struct device_attribute *attr, char *buf) +{ + struct gk20a *g = get_gk20a(dev); + + return sprintf(buf, "%d\n", g->gr.czf_bypass); +} + +static DEVICE_ATTR(czf_bypass, ROOTRW, czf_bypass_read, czf_bypass_store); + + +void nvgpu_remove_sysfs(struct device *dev) { device_remove_file(dev, &dev_attr_elcg_enable); device_remove_file(dev, &dev_attr_blcg_enable); @@ -919,6 +961,8 @@ void gk20a_remove_sysfs(struct device *dev) nvgpu_nvhost_remove_symlink(get_gk20a(dev)); #endif + device_remove_file(dev, &dev_attr_czf_bypass); + if (strcmp(dev_name(dev), "gpu.0")) { struct kobject *kobj = &dev->kobj; struct device *parent = container_of((kobj->parent), @@ -927,8 +971,9 @@ void gk20a_remove_sysfs(struct device *dev) } } -void gk20a_create_sysfs(struct device *dev) +int nvgpu_create_sysfs(struct device *dev) { + struct gk20a *g = get_gk20a(dev); int error = 0; error |= device_create_file(dev, &dev_attr_elcg_enable); @@ -958,9 +1003,11 @@ void gk20a_create_sysfs(struct device *dev) error |= device_create_file(dev, &dev_attr_max_timeslice_us); #ifdef CONFIG_TEGRA_GK20A_NVHOST - error |= nvgpu_nvhost_create_symlink(get_gk20a(dev)); + error |= nvgpu_nvhost_create_symlink(g); #endif + error |= device_create_file(dev, &dev_attr_czf_bypass); + if (strcmp(dev_name(dev), "gpu.0")) { struct kobject *kobj = &dev->kobj; struct device *parent = container_of((kobj->parent), @@ -970,6 +1017,7 @@ void gk20a_create_sysfs(struct device *dev) } if (error) - dev_err(dev, "Failed to create sysfs attributes!\n"); + nvgpu_err(g, "Failed to create sysfs attributes!\n"); + return error; } diff --git a/drivers/gpu/nvgpu/gp10b/gp10b_sysfs.h b/drivers/gpu/nvgpu/common/linux/sysfs.h similarity index 56% rename from drivers/gpu/nvgpu/gp10b/gp10b_sysfs.h rename to drivers/gpu/nvgpu/common/linux/sysfs.h index f56ccfc72..809258444 100644 --- a/drivers/gpu/nvgpu/gp10b/gp10b_sysfs.h +++ b/drivers/gpu/nvgpu/common/linux/sysfs.h @@ -1,7 +1,5 @@ /* - * GP10B specific sysfs files - * - * Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2017, NVIDIA CORPORATION. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -11,12 +9,16 @@ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . */ +#ifndef NVGPU_SYSFS_H +#define NVGPU_SYSFS_H -#ifndef _GP10B_SYSFS_H_ -#define _GP10B_SYSFS_H_ +struct device; -void gp10b_create_sysfs(struct device *dev); -void gp10b_remove_sysfs(struct device *dev); +int nvgpu_create_sysfs(struct device *dev); +void nvgpu_remove_sysfs(struct device *dev); -#endif /*_GP10B_SYSFS_H_*/ +#endif diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h index 7dc72f7b4..acfb6144b 100644 --- a/drivers/gpu/nvgpu/gk20a/gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/gk20a.h @@ -1419,9 +1419,6 @@ enum { KEPLER_CHANNEL_GPFIFO_C = 0xA26F, }; -void gk20a_create_sysfs(struct device *dev); -void gk20a_remove_sysfs(struct device *dev); - #define GK20A_BAR0_IORESOURCE_MEM 0 #define GK20A_BAR1_IORESOURCE_MEM 1 #define GK20A_SIM_IORESOURCE_MEM 2 diff --git a/drivers/gpu/nvgpu/gp10b/gp10b_sysfs.c b/drivers/gpu/nvgpu/gp10b/gp10b_sysfs.c deleted file mode 100644 index 1c90d2f92..000000000 --- a/drivers/gpu/nvgpu/gp10b/gp10b_sysfs.c +++ /dev/null @@ -1,68 +0,0 @@ -/* - * GP10B specific sysfs files - * - * Copyright (c) 2016-2017, NVIDIA CORPORATION. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#include - -#include "gk20a/gk20a.h" -#include "gk20a/platform_gk20a.h" -#include "gp10b_sysfs.h" - -#include - -#define ROOTRW (S_IRWXU|S_IRGRP|S_IROTH) - -static ssize_t czf_bypass_store(struct device *dev, - struct device_attribute *attr, const char *buf, size_t count) -{ - struct gk20a *g = get_gk20a(dev); - unsigned long val; - - if (kstrtoul(buf, 10, &val) < 0) - return -EINVAL; - - if (val >= 4) - return -EINVAL; - - g->gr.czf_bypass = val; - - return count; -} - -static ssize_t czf_bypass_read(struct device *dev, - struct device_attribute *attr, char *buf) -{ - struct gk20a *g = get_gk20a(dev); - - return sprintf(buf, "%d\n", g->gr.czf_bypass); -} - -static DEVICE_ATTR(czf_bypass, ROOTRW, czf_bypass_read, czf_bypass_store); - -void gp10b_create_sysfs(struct device *dev) -{ - struct gk20a *g = get_gk20a(dev); - int error = 0; - - g->gr.czf_bypass = gr_gpc0_prop_debug1_czf_bypass_init_v(); - - error |= device_create_file(dev, &dev_attr_czf_bypass); - if (error) - nvgpu_err(g, "Failed to create sysfs attributes!"); -} - -void gp10b_remove_sysfs(struct device *dev) -{ - device_remove_file(dev, &dev_attr_czf_bypass); -} diff --git a/drivers/gpu/nvgpu/gp10b/gr_gp10b.c b/drivers/gpu/nvgpu/gp10b/gr_gp10b.c index 3bddef4ce..f27e26059 100644 --- a/drivers/gpu/nvgpu/gp10b/gr_gp10b.c +++ b/drivers/gpu/nvgpu/gp10b/gr_gp10b.c @@ -31,7 +31,6 @@ #include "gm20b/gr_gm20b.h" #include "gp10b/gr_gp10b.h" -#include "gp10b_sysfs.h" #include #include @@ -2292,6 +2291,8 @@ static int gr_gp10b_init_preemption_state(struct gk20a *g) gr_debug_2_gfxp_wfi_always_injects_wfi_enabled_f()); gk20a_writel(g, gr_debug_2_r(), debug_2); + g->gr.czf_bypass = gr_gpc0_prop_debug1_czf_bypass_init_v(); + return 0; } diff --git a/drivers/gpu/nvgpu/gp10b/pmu_gp10b.c b/drivers/gpu/nvgpu/gp10b/pmu_gp10b.c index 58844e8fb..a113d22e0 100644 --- a/drivers/gpu/nvgpu/gp10b/pmu_gp10b.c +++ b/drivers/gpu/nvgpu/gp10b/pmu_gp10b.c @@ -23,7 +23,6 @@ #include "gm20b/pmu_gm20b.h" #include "pmu_gp10b.h" -#include "gp10b_sysfs.h" #include #include