From 8c5ea40ccaad022401e45e61d5b6ff3354ffa413 Mon Sep 17 00:00:00 2001 From: David Nieto Date: Mon, 16 Oct 2017 12:24:25 -0700 Subject: [PATCH] gpu: nvgpu: handle smid table init failures Handle the possibility of failing gr init due to smid table initialization failures bug 2004378 Change-Id: I904b918a0ea31c32292edb3ab8ac3b1459c38a28 Signed-off-by: David Nieto Reviewed-on: https://git-master.nvidia.com/r/1581661 Reviewed-by: Alex Waterman Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom --- drivers/gpu/nvgpu/gk20a/gr_gk20a.c | 10 ++++++++-- drivers/gpu/nvgpu/gm20b/gr_gm20b.c | 8 ++++++-- drivers/gpu/nvgpu/vgpu/gr_vgpu.c | 7 +++++-- 3 files changed, 19 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c index 700dcdf84..1b9ecd864 100644 --- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c @@ -1164,8 +1164,12 @@ int gr_gk20a_init_fs_state(struct gk20a *g) gk20a_dbg_fn(""); - if (g->ops.gr.init_sm_id_table) + if (g->ops.gr.init_sm_id_table) { g->ops.gr.init_sm_id_table(g); + /* Is table empty ? */ + if (g->gr.no_of_sm == 0) + return -EINVAL; + } for (sm_id = 0; sm_id < g->gr.no_of_sm; sm_id++) { tpc_index = g->gr.sm_to_cluster[sm_id].tpc_index; @@ -1459,7 +1463,9 @@ static int gr_gk20a_init_golden_ctx_image(struct gk20a *g, g->ops.gr.commit_global_timeslice(g, c, false); /* floorsweep anything left */ - g->ops.gr.init_fs_state(g); + err = g->ops.gr.init_fs_state(g); + if (err) + goto clean_up; err = gr_gk20a_wait_idle(g, gk20a_get_gr_idle_timeout(g), GR_IDLE_CHECK_DEFAULT); diff --git a/drivers/gpu/nvgpu/gm20b/gr_gm20b.c b/drivers/gpu/nvgpu/gm20b/gr_gm20b.c index 92096cfad..af834b02e 100644 --- a/drivers/gpu/nvgpu/gm20b/gr_gm20b.c +++ b/drivers/gpu/nvgpu/gm20b/gr_gm20b.c @@ -658,9 +658,13 @@ int gr_gm20b_load_smid_config(struct gk20a *g) int gr_gm20b_init_fs_state(struct gk20a *g) { + int err = 0; + gk20a_dbg_fn(""); - gr_gk20a_init_fs_state(g); + err = gr_gk20a_init_fs_state(g); + if (err) + return err; g->ops.gr.load_tpc_mask(g); @@ -675,7 +679,7 @@ int gr_gm20b_init_fs_state(struct gk20a *g) g->ops.gr.load_smid_config(g); - return 0; + return err; } int gr_gm20b_load_ctxsw_ucode_segments(struct gk20a *g, u64 addr_base, diff --git a/drivers/gpu/nvgpu/vgpu/gr_vgpu.c b/drivers/gpu/nvgpu/vgpu/gr_vgpu.c index b913847b6..2d6beda69 100644 --- a/drivers/gpu/nvgpu/vgpu/gr_vgpu.c +++ b/drivers/gpu/nvgpu/vgpu/gr_vgpu.c @@ -615,6 +615,7 @@ static int vgpu_gr_init_gr_config(struct gk20a *g, struct gr_gk20a *gr) { struct vgpu_priv_data *priv = vgpu_get_priv_data(g); u32 gpc_index; + int err = -ENOMEM; gk20a_dbg_fn(""); @@ -653,7 +654,9 @@ static int vgpu_gr_init_gr_config(struct gk20a *g, struct gr_gk20a *gr) g->ops.gr.bundle_cb_defaults(g); g->ops.gr.cb_size_default(g); g->ops.gr.calc_global_ctx_buffer_size(g); - g->ops.gr.init_fs_state(g); + err = g->ops.gr.init_fs_state(g); + if (err) + goto cleanup; return 0; cleanup: nvgpu_err(g, "out of memory"); @@ -664,7 +667,7 @@ cleanup: nvgpu_kfree(g, gr->gpc_tpc_mask); gr->gpc_tpc_mask = NULL; - return -ENOMEM; + return err; } int vgpu_gr_bind_ctxsw_zcull(struct gk20a *g, struct gr_gk20a *gr,