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gpu: nvgpu: MISRA 21.15 fixes to mm code

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MISRA Rule 21.15 prohibits use of memcpy() with incompatible ptrs
to qualified/unqualified types.

To circumvent this issue we've introduced a new MISRA-compliant
nvgpu_memcpy() function.

This change switches all offending uses of memcpy() in mm/*
over to use nvgpu_memcpy() with appropriate casts applied.

JIRA NVGPU-849

Change-Id: I17be87475fde62e969b014d4d0fa455dae5d4373
Signed-off-by: Scott Long <scottl@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1941257
Reviewed-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-by: svc-misra-checker <svc-misra-checker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Scott Long
2018-11-01 12:29:27 -07:00
committed by mobile promotions
parent 44b4b036e2
commit 8cc8aeb322
1 changed files with 4 additions and 2 deletions
Download Patch File Download Diff File Expand all files Collapse all files

6
drivers/gpu/nvgpu/common/mm/nvgpu_mem.c
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@@ -26,6 +26,8 @@
#include <nvgpu/dma.h>
#include <nvgpu/vidmem.h>
#include <nvgpu/gk20a.h>
#include <nvgpu/string.h>
/*
* Make sure to use the right coherency aperture if you use this function! This
* will not add any checks. If you want to simply use the default coherency then
@@ -240,7 +242,7 @@ void nvgpu_mem_rd_n(struct gk20a *g, struct nvgpu_mem *mem,
u8 *src = (u8 *)mem->cpu_va + offset;
WARN_ON(mem->cpu_va == NULL);
(void) memcpy(dest, src, size);
nvgpu_memcpy((u8 *)dest, src, size);
} else if (mem->aperture == APERTURE_VIDMEM) {
nvgpu_pramin_rd_n(g, mem, offset, size, dest);
} else {
@@ -281,7 +283,7 @@ void nvgpu_mem_wr_n(struct gk20a *g, struct nvgpu_mem *mem, u32 offset,
u8 *dest = (u8 *)mem->cpu_va + offset;
WARN_ON(mem->cpu_va == NULL);
(void) memcpy(dest, src, size);
nvgpu_memcpy(dest, (u8 *)src, size);
} else if (mem->aperture == APERTURE_VIDMEM) {
nvgpu_pramin_wr_n(g, mem, offset, size, src);
if (!mem->skip_wmb) {