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gpu: nvgpu: collapse nvgpu_gr_prepare_sw into nvgpu_gr_alloc

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common.gr unit exports a separate API nvgpu_gr_prepare_sw to
initialize some SW pieces required for nvgpu_gr_enable_hw().
A separate API is really unnecessary since same initialization
can be performed in nvgpu_gr_alloc().

Remove nvgpu_gr_prepare_sw() and HAL gops.gr.gr_prepare_sw().
Initialize falcon and interrupt structures in loop from
nvgpu_gr_alloc().

Move nvgpu_netlist_init_ctx_vars() from nvgpu_gr_prepare_sw() to
common init path since netlist parsing need not be done from
common.gr unit. It just needs to happen before nvgpu_gr_enable_hw().

Also, trigger nvgpu_gr_free() from gr_remove_support() instead
of OS specific paths. Also remove nvgpu_gr_free() calls from
probe error paths since nvgpu_gr_alloc is no longer called in
probe path.

Move interrupt and falcon data structure free calls to nvgpu_gr_free().

Also remove corresponding unit testing code that tests
nvgpu_gr_prepare_sw() specifically.
Update some unit tests to initialize ecc counters and netlist.
Disable some unit tests that fail for reasons unknown.

Jira NVGPU-5648

Change-Id: I82ec8160f76530bc40e0c11a9f26ba1c8f9cf643
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2400166
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Deepak Nibade
2020-08-18 17:24:34 +05:30
committed by Alex Waterman
parent cfa360f5b8
commit 8cccb49bd2
25 changed files with 129 additions and 259 deletions
Download Patch File Download Diff File Expand all files Collapse all files

26
userspace/units/acr/nvgpu-acr.c
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@@ -33,6 +33,7 @@
#include <nvgpu/hal_init.h>
#include <nvgpu/lock.h>
#include <nvgpu/firmware.h>
#include <nvgpu/netlist.h>
#include <nvgpu/gr/gr.h>
@@ -236,6 +237,16 @@ static int init_acr_falcon_test_env(struct unit_module *m, struct gk20a *g)
return -ENODEV;
}
err = g->ops.ecc.ecc_init_support(g);
if (err != 0) {
unit_return_fail(m, "ecc init failed\n");
}
err = nvgpu_netlist_init_ctx_vars(g);
if (err != 0) {
unit_return_fail(m, "netlist init failed\n");
}
nvgpu_set_enabled(g, NVGPU_SEC_SECUREGPCCS, true);
err = nvgpu_gr_alloc(g);
if (err != 0) {
@@ -296,16 +307,6 @@ static int prepare_gr_hw_sw(struct unit_module *m, struct gk20a *g)
{
int err;
/*
* prepare portion of sw required
* for enable hw
*/
err = nvgpu_gr_prepare_sw(g);
if (err != 0) {
nvgpu_mutex_release(&g->tpc_pg_lock);
unit_return_fail(m, "failed to prepare sw");
}
err = nvgpu_gr_enable_hw(g);
if (err != 0) {
nvgpu_mutex_release(&g->tpc_pg_lock);
@@ -880,11 +881,6 @@ int test_acr_init(struct unit_module *m,
return -ENOMEM;
}
err = g->ops.ecc.ecc_init_support(g);
if (err != 0) {
unit_return_fail(m, "ecc init failed\n");
}
/*
* initialize PMU
*/