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gpu: nvgpu: gm20b pass correct clk to tegra_dvfs

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Restoring original behavior. Use gbus instead of gpu_ref clk as the
argument to tegra_dvfs_get_fmax_at_vmin_safe_t(). Bug was introduced
due to refactoring in 01e61860fa,
changing behavior when nvgpu is compiled with
CONFIG_TEGRA_CLK_FRAMEWORK.

Bug 200233943

Change-Id: Id2deec0107bd0c26a12feb511db22fc69e09a985
Signed-off-by: Peter Boonstoppel <pboonstoppel@nvidia.com>
Reviewed-on: http://git-master/r/1269848
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Jonathan Hunter <jonathanh@nvidia.com>
Tested-by: Jonathan Hunter <jonathanh@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Shreshtha Sahu <ssahu@nvidia.com>
This commit is contained in:
Peter Boonstoppel
2016-12-12 17:00:55 -08:00
committed by mobile promotions
parent 339a67b2e8
commit 8ccfe2569c
1 changed files with 1 additions and 2 deletions
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3
drivers/gpu/nvgpu/gm20b/clk_gm20b.c
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@@ -1155,8 +1155,7 @@ static int gm20b_init_clk_setup_sw(struct gk20a *g)
clk->gpc_pll.id = GK20A_GPC_PLL; clk->gpc_pll.id = GK20A_GPC_PLL;
clk->gpc_pll.clk_in = clk_get_rate(ref) / KHZ; clk->gpc_pll.clk_in = clk_get_rate(ref) / KHZ;
safe_rate = tegra_dvfs_get_fmax_at_vmin_safe_t( safe_rate = tegra_dvfs_get_fmax_at_vmin_safe_t(c);
clk_get_parent(c));
safe_rate = safe_rate * (100 - DVFS_SAFE_MARGIN) / 100; safe_rate = safe_rate * (100 - DVFS_SAFE_MARGIN) / 100;
dvfs_safe_max_freq = rate_gpu_to_gpc2clk(safe_rate); dvfs_safe_max_freq = rate_gpu_to_gpc2clk(safe_rate);
clk->gpc_pll.PL = (dvfs_safe_max_freq == 0) ? 0 : clk->gpc_pll.PL = (dvfs_safe_max_freq == 0) ? 0 :