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gpu: nvgpu: add user API to get a syncpoint
Add new user API NVGPU_IOCTL_CHANNEL_GET_USER_SYNCPOINT which will expose per-channel allocated syncpoint to user space API will also return current value of the syncpoint On supported platforms, this API will also return a RW semaphore address (corresponding to syncpoint shim) to user space Add new characteristics flag NVGPU_GPU_FLAGS_SUPPORT_USER_SYNCPOINT to indicate support for this new API Add new flag NVGPU_SUPPORT_USER_SYNCPOINT for use of core driver Set this flag for GV11B and GP10B for now Add a new API (*syncpt_address) in struct gk20a_channel_sync to get GPU_VA address of a syncpoint Add new API nvgpu_nvhost_syncpt_read_maxval() which will read and return MAX value of syncpoint Bug 200326065 Jira NVGPU-179 Change-Id: I9da6f17b85996f4fc6731c0bf94fca6f3181c3e0 Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1658009 Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Konsta Holtta <kholtta@nvidia.com> Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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@@ -32,6 +32,7 @@
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#include <nvgpu/enabled.h>
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#include <nvgpu/error_notifier.h>
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#include <nvgpu/barrier.h>
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#include <nvgpu/nvhost.h>
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#include "gk20a/gk20a.h"
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#include "gk20a/dbg_gpu_gk20a.h"
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@@ -948,6 +949,60 @@ static int nvgpu_ioctl_channel_set_preemption_mode(struct channel_gk20a *ch,
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return err;
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}
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static int nvgpu_ioctl_channel_get_user_syncpoint(struct channel_gk20a *ch,
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struct nvgpu_get_user_syncpoint_args *args)
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{
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#ifdef CONFIG_TEGRA_GK20A_NVHOST
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struct gk20a *g = ch->g;
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int err;
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if (!nvgpu_is_enabled(g, NVGPU_SUPPORT_USER_SYNCPOINT)) {
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nvgpu_err(g, "user syncpoints not supported");
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return -EINVAL;
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}
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if (!gk20a_platform_has_syncpoints(g)) {
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nvgpu_err(g, "syncpoints not supported");
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return -EINVAL;
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}
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if (g->aggressive_sync_destroy_thresh) {
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nvgpu_err(g, "sufficient syncpoints not available");
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return -EINVAL;
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}
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nvgpu_mutex_acquire(&ch->sync_lock);
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if (ch->sync) {
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nvgpu_mutex_release(&ch->sync_lock);
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} else {
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ch->sync = gk20a_channel_sync_create(ch);
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if (!ch->sync) {
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nvgpu_mutex_release(&ch->sync_lock);
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return -ENOMEM;
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}
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nvgpu_mutex_release(&ch->sync_lock);
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if (g->ops.fifo.resetup_ramfc) {
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err = g->ops.fifo.resetup_ramfc(ch);
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if (err)
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return err;
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}
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}
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args->syncpoint_id = ch->sync->syncpt_id(ch->sync);
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args->syncpoint_max = nvgpu_nvhost_syncpt_read_maxval(g->nvhost_dev,
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args->syncpoint_id);
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if (nvgpu_is_enabled(g, NVGPU_SUPPORT_SYNCPOINT_ADDRESS))
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args->gpu_va = ch->sync->syncpt_address(ch->sync);
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else
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args->gpu_va = 0;
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return 0;
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#else
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return -EINVAL;
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#endif
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}
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long gk20a_channel_ioctl(struct file *filp,
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unsigned int cmd, unsigned long arg)
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{
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@@ -1239,6 +1294,18 @@ long gk20a_channel_ioctl(struct file *filp,
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err = -EINVAL;
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}
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break;
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case NVGPU_IOCTL_CHANNEL_GET_USER_SYNCPOINT:
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err = gk20a_busy(ch->g);
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if (err) {
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dev_err(dev,
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"%s: failed to host gk20a for ioctl cmd: 0x%x",
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__func__, cmd);
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break;
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}
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err = nvgpu_ioctl_channel_get_user_syncpoint(ch,
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(struct nvgpu_get_user_syncpoint_args *)buf);
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gk20a_idle(ch->g);
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break;
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default:
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dev_dbg(dev, "unrecognized ioctl cmd: 0x%x", cmd);
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err = -ENOTTY;
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@@ -158,6 +158,8 @@ static struct nvgpu_flags_mapping flags_mapping[] = {
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NVGPU_SUPPORT_DETERMINISTIC_OPTS},
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{NVGPU_GPU_FLAGS_SUPPORT_SYNCPOINT_ADDRESS,
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NVGPU_SUPPORT_SYNCPOINT_ADDRESS},
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{NVGPU_GPU_FLAGS_SUPPORT_USER_SYNCPOINT,
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NVGPU_SUPPORT_USER_SYNCPOINT},
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{NVGPU_GPU_FLAGS_SUPPORT_IO_COHERENCE,
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NVGPU_SUPPORT_IO_COHERENCE},
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{NVGPU_GPU_FLAGS_SUPPORT_RESCHEDULE_RUNLIST,
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@@ -152,6 +152,12 @@ int nvgpu_nvhost_syncpt_read_ext_check(
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return nvhost_syncpt_read_ext_check(nvhost_dev->host1x_pdev, id, val);
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}
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u32 nvgpu_nvhost_syncpt_read_maxval(
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struct nvgpu_nvhost_dev *nvhost_dev, u32 id)
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{
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return nvhost_syncpt_read_maxval(nvhost_dev->host1x_pdev, id);
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}
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int nvgpu_nvhost_create_symlink(struct gk20a *g)
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{
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struct device *dev = dev_from_gk20a(g);
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