gpu: nvgpu: Hard code map_buffer_batch_limit

Add a hard coded #define for map_buffer_batch_limit and use that
insted of querying from GPU characteristics. Also add an
nvgpu_is_enabled() flag for disabling batch mapping, and set
map_buffer_batch_limit to zero if batch mapping is disabled.

JIRA NVGPU-388

Change-Id: Ic91feea638d0f47c5c22321886cfc75e97259dc3
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1593690
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

drivers/gpu/nvgpu/common/linux/ioctl_as.c

@@ -112,7 +112,6 @@ static int gk20a_as_ioctl_map_buffer_batch(
 	struct gk20a_as_share *as_share,
 	struct nvgpu_as_map_buffer_batch_args *args)
 {
-	struct gk20a *g = as_share->vm->mm->g;
 	u32 i;
 	int err = 0;
 
@@ -127,8 +126,8 @@ static int gk20a_as_ioctl_map_buffer_batch(
 
 	gk20a_dbg_fn("");
 
-	if (args->num_unmaps > g->gpu_characteristics.map_buffer_batch_limit ||
+	if (args->num_unmaps > NVGPU_IOCTL_AS_MAP_BUFFER_BATCH_LIMIT ||
-	    args->num_maps > g->gpu_characteristics.map_buffer_batch_limit)
+	    args->num_maps > NVGPU_IOCTL_AS_MAP_BUFFER_BATCH_LIMIT)
 		return -EINVAL;
 
 	nvgpu_vm_mapping_batch_start(&batch);

drivers/gpu/nvgpu/common/linux/ioctl_as.h

@@ -18,6 +18,10 @@
 struct inode;
 struct file;
 
+/* MAP_BUFFER_BATCH_LIMIT: the upper limit for num_unmaps and
+ * num_maps */
+#define NVGPU_IOCTL_AS_MAP_BUFFER_BATCH_LIMIT	256
+
 /* struct file_operations driver interface */
 int gk20a_as_dev_open(struct inode *inode, struct file *filp);
 int gk20a_as_dev_release(struct inode *inode, struct file *filp);

drivers/gpu/nvgpu/common/linux/ioctl_ctrl.c

@@ -34,6 +34,7 @@
 
 #include "ioctl_ctrl.h"
 #include "ioctl_dbg.h"
+#include "ioctl_as.h"
 #ifdef CONFIG_TEGRA_19x_GPU
 #include "common/linux/ioctl_ctrl_t19x.h"
 #endif
@@ -209,6 +210,8 @@ gk20a_ctrl_ioctl_gpu_characteristics(
 	pgpu->impl = g->params.gpu_impl;
 	pgpu->rev = g->params.gpu_rev;
 	pgpu->reg_ops_limit = NVGPU_IOCTL_DBG_REG_OPS_LIMIT;
+	pgpu->map_buffer_batch_limit = nvgpu_is_enabled(g, NVGPU_SUPPORT_MAP_BUFFER_BATCH) ?
+		NVGPU_IOCTL_AS_MAP_BUFFER_BATCH_LIMIT : 0;
 	pgpu->twod_class = g->ops.get_litter_value(g, GPU_LIT_TWOD_CLASS);
 	pgpu->threed_class = g->ops.get_litter_value(g, GPU_LIT_THREED_CLASS);
 	pgpu->compute_class = g->ops.get_litter_value(g, GPU_LIT_COMPUTE_CLASS);

drivers/gpu/nvgpu/gk20a/gk20a.c

@@ -397,6 +397,7 @@ int gk20a_init_gpu_characteristics(struct gk20a *g)
 
 	__nvgpu_set_enabled(g, NVGPU_SUPPORT_PARTIAL_MAPPINGS, true);
 	__nvgpu_set_enabled(g, NVGPU_SUPPORT_MAP_DIRECT_KIND_CTRL, true);
+	__nvgpu_set_enabled(g, NVGPU_SUPPORT_MAP_BUFFER_BATCH, true);
 
 	if (IS_ENABLED(CONFIG_SYNC))
 		__nvgpu_set_enabled(g, NVGPU_SUPPORT_SYNC_FENCE_FDS, true);
@@ -464,8 +465,6 @@ int gk20a_init_gpu_characteristics(struct gk20a *g)
 	gpu->cbc_cache_line_size = g->gr.cacheline_size;
 	gpu->cbc_comptags_per_line = g->gr.comptags_per_cacheline;
 
-	gpu->map_buffer_batch_limit = 256;
-
 	if (g->ops.clk.get_maxrate)
 		gpu->max_freq = g->ops.clk.get_maxrate(&g->clk);
 

drivers/gpu/nvgpu/include/nvgpu/enabled.h

@@ -66,6 +66,8 @@ struct gk20a;
 #define NVGPU_SUPPORT_SPARSE_ALLOCS		23
 /* Direct PTE kind control is supported (map_buffer_ex) */
 #define NVGPU_SUPPORT_MAP_DIRECT_KIND_CTRL	24
+/* Support batch mapping */
+#define NVGPU_SUPPORT_MAP_BUFFER_BATCH		25
 
 /*
  * Host flags

drivers/gpu/nvgpu/vgpu/vgpu.c

@@ -368,7 +368,7 @@ int vgpu_init_gpu_characteristics(struct gk20a *g)
 		return err;
 
 	g->gpu_characteristics.max_freq = priv->constants.max_freq;
-	g->gpu_characteristics.map_buffer_batch_limit = 0;
+	__nvgpu_set_enabled(g, NVGPU_SUPPORT_MAP_BUFFER_BATCH, false);
 
 	/* features vgpu does not support */
 	__nvgpu_set_enabled(g, NVGPU_SUPPORT_RESCHEDULE_RUNLIST, false);