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gpu: nvgpu: handle vf curve change due to temp

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JIRA DNVGPU-129

1)Add function hook for PMU VFE event handler which will do for VF
curve re-evaluation

2)Add function hook to send temperature limit of GPU sensor

3)Call VFE event handler from PMU's event handle function

Change-Id: I2e3577d3d895e97e6ad06e92f0f4827f9855d0b6
Signed-off-by: Vijayakumar <vsubbu@nvidia.com>
Reviewed-on: http://git-master/r/1245393
(cherry picked from commit 1a5c6c32cdec73fb23735430f43577eda675e5af)
Reviewed-on: http://git-master/r/1268060
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Vijayakumar
2016-10-27 19:16:36 +05:30
committed by mobile promotions
parent 68eeda3ebd
commit 8ef013e36e
3 changed files with 15 additions and 1 deletions
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5
drivers/gpu/nvgpu/gk20a/gk20a.h
View File

@@ -589,6 +589,8 @@ struct gpu_ops {
int (*elcg_init_idle_filters)(struct gk20a *g);
void (*therm_debugfs_init)(struct gk20a *g);
int (*get_internal_sensor_curr_temp)(struct gk20a *g, u32 *temp_f24_8);
void (*get_internal_sensor_limits)(s32 *max_24_8,
s32 *min_24_8);
} therm;
struct {
bool (*is_pmu_supported)(struct gk20a *g);
@@ -642,6 +644,9 @@ struct gpu_ops {
int (*get_arbiter_clk_default)(struct gk20a *g, u32 api_domain,
u16 *default_mhz);
} clk_arb;
struct {
int (*handle_pmu_perf_event)(struct gk20a *g, void *pmu_msg);
} perf;
bool privsecurity;
bool securegpccs;
bool pmupstate;

10
drivers/gpu/nvgpu/gk20a/pmu_gk20a.c
View File

@@ -3976,14 +3976,22 @@ static int pmu_handle_perfmon_event(struct pmu_gk20a *pmu,
static int pmu_handle_event(struct pmu_gk20a *pmu, struct pmu_msg *msg)
{
int err = 0;
struct gk20a *g = gk20a_from_pmu(pmu);
gk20a_dbg_fn("");
switch (msg->hdr.unit_id) {
case PMU_UNIT_PERFMON:
case PMU_UNIT_PERFMON_T18X:
err = pmu_handle_perfmon_event(pmu, &msg->msg.perfmon);
break;
case PMU_UNIT_PERF:
if (g->ops.perf.handle_pmu_perf_event != NULL) {
err = g->ops.perf.handle_pmu_perf_event(g,
(void *)&msg->msg.perf);
} else {
WARN_ON(1);
}
break;
default:
break;
}

1
drivers/gpu/nvgpu/pmuif/gpmuifperf.h
View File

@@ -87,6 +87,7 @@ struct nv_pmu_perf_rpc {
#define NV_PMU_PERF_MSG_ID_RPC (0x00000003)
#define NV_PMU_PERF_MSG_ID_BOARDOBJ_GRP_SET (0x00000004)
#define NV_PMU_PERF_MSG_ID_BOARDOBJ_GRP_GET_STATUS (0x00000006)
#define NV_PMU_PERF_MSG_ID_VFE_CALLBACK (0x00000005)
/*!
* Message carrying the result of the perf RPC execution.