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gpu: nvgpu: unit: initialize nvgpu_mem variables

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There were several places were nvgpu_mem structs were declared on the
stack and not initialized. Some fields could be used erroneously by
underlying APIs.

To allow the initialization of an array of nvgpu_mem in
test_dma_alloc_fi_delayed_enable(), the array length had to be changed
from a const to a macro.

JIRA NVGPU-1563

Change-Id: I6c23445af7d932710898df2e23a8fd892bee77b3
Signed-off-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1967966
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Philip Elcan
2018-12-07 10:15:26 -05:00
committed by mobile promotions
parent 6777bd5ed2
commit 8f15a2903c
4 changed files with 17 additions and 17 deletions
Download Patch File Download Diff File Expand all files Collapse all files

4
userspace/units/mm/nvgpu_sgt/nvgpu_sgt.c
View File

@@ -72,7 +72,7 @@ static int test_nvgpu_sgt_basic_apis(struct unit_module *m, struct gk20a *g,
{ {
int ret = UNIT_SUCCESS; int ret = UNIT_SUCCESS;
struct nvgpu_os_posix *p = nvgpu_os_posix_from_gk20a(g); struct nvgpu_os_posix *p = nvgpu_os_posix_from_gk20a(g);
struct nvgpu_mem mem; struct nvgpu_mem mem = { };
struct nvgpu_sgt *sgt; struct nvgpu_sgt *sgt;
struct nvgpu_mem_sgl *sgl; struct nvgpu_mem_sgl *sgl;
struct nvgpu_sgt_ops const *saved_ops_ptr; struct nvgpu_sgt_ops const *saved_ops_ptr;
@@ -404,7 +404,7 @@ static int test_nvgpu_sgt_alignment_with_iommu(struct unit_module *m,
{ {
int ret = UNIT_SUCCESS; int ret = UNIT_SUCCESS;
struct nvgpu_os_posix *p = nvgpu_os_posix_from_gk20a(g); struct nvgpu_os_posix *p = nvgpu_os_posix_from_gk20a(g);
struct nvgpu_mem mem; struct nvgpu_mem mem = { };
struct nvgpu_sgt *sgt; struct nvgpu_sgt *sgt;
struct nvgpu_mem_sgl *sgl; struct nvgpu_mem_sgl *sgl;
u64 alignment; u64 alignment;

8
userspace/units/mm/page_table/page_table.c
View File

@@ -344,7 +344,7 @@ static u64 pte_get_phys_addr(u32 *pte)
static int test_nvgpu_gmmu_map_unmap(struct unit_module *m, static int test_nvgpu_gmmu_map_unmap(struct unit_module *m,
struct gk20a *g, void *args) struct gk20a *g, void *args)
{ {
struct nvgpu_mem mem; struct nvgpu_mem mem = { };
u32 pte[2]; u32 pte[2];
int result; int result;
struct nvgpu_os_posix *p = nvgpu_os_posix_from_gk20a(g); struct nvgpu_os_posix *p = nvgpu_os_posix_from_gk20a(g);
@@ -443,7 +443,7 @@ static int test_nvgpu_gmmu_map_unmap(struct unit_module *m,
static int test_nvgpu_gmmu_set_pte(struct unit_module *m, static int test_nvgpu_gmmu_set_pte(struct unit_module *m,
struct gk20a *g, void *args) struct gk20a *g, void *args)
{ {
struct nvgpu_mem mem; struct nvgpu_mem mem = { };
u32 pte[2]; u32 pte[2];
int result; int result;
struct nvgpu_os_posix *p = nvgpu_os_posix_from_gk20a(g); struct nvgpu_os_posix *p = nvgpu_os_posix_from_gk20a(g);
@@ -582,7 +582,7 @@ static void gmmu_unmap_advanced(struct vm_gk20a *vm, struct nvgpu_mem *mem,
static int test_nvgpu_gmmu_map_unmap_adv(struct unit_module *m, static int test_nvgpu_gmmu_map_unmap_adv(struct unit_module *m,
struct gk20a *g, void *args) struct gk20a *g, void *args)
{ {
struct nvgpu_mem mem; struct nvgpu_mem mem = { };
u64 vaddr; u64 vaddr;
struct test_parameters *params = (struct test_parameters *) args; struct test_parameters *params = (struct test_parameters *) args;
@@ -609,7 +609,7 @@ static int test_nvgpu_gmmu_map_unmap_adv(struct unit_module *m,
static int test_nvgpu_gmmu_map_unmap_batched(struct unit_module *m, static int test_nvgpu_gmmu_map_unmap_batched(struct unit_module *m,
struct gk20a *g, void *args) struct gk20a *g, void *args)
{ {
struct nvgpu_mem mem, mem2; struct nvgpu_mem mem = { }, mem2 = { };
u64 vaddr, vaddr2; u64 vaddr, vaddr2;
struct vm_gk20a_mapping_batch batch; struct vm_gk20a_mapping_batch batch;

16
userspace/units/posix/fault-injection/posix-fault-injection-dma-alloc.c
View File

@@ -74,7 +74,7 @@ int test_dma_alloc_init(struct unit_module *m,
int test_dma_alloc_fi_default(struct unit_module *m, int test_dma_alloc_fi_default(struct unit_module *m,
struct gk20a *g, void *__args) struct gk20a *g, void *__args)
{ {
struct nvgpu_mem mem; struct nvgpu_mem mem = { };
int result; int result;
int ret = UNIT_SUCCESS; int ret = UNIT_SUCCESS;
@@ -118,7 +118,7 @@ test_exit:
int test_dma_alloc_fi_enabled(struct unit_module *m, int test_dma_alloc_fi_enabled(struct unit_module *m,
struct gk20a *g, void *__args) struct gk20a *g, void *__args)
{ {
struct nvgpu_mem mem; struct nvgpu_mem mem = { };
int result; int result;
int ret = UNIT_SUCCESS; int ret = UNIT_SUCCESS;
@@ -164,9 +164,9 @@ test_exit:
int test_dma_alloc_fi_delayed_enable(struct unit_module *m, int test_dma_alloc_fi_delayed_enable(struct unit_module *m,
struct gk20a *g, void *__args) struct gk20a *g, void *__args)
{ {
const unsigned int fail_after = 2; #define FAIL_AFTER 2
unsigned int call_count = 0; unsigned int call_count = 0;
struct nvgpu_mem mem[fail_after+1]; struct nvgpu_mem mem[FAIL_AFTER+1] = { };
int result = 0; int result = 0;
int ret = UNIT_SUCCESS; int ret = UNIT_SUCCESS;
@@ -177,7 +177,7 @@ int test_dma_alloc_fi_delayed_enable(struct unit_module *m,
} }
/* enable fault injection after delay */ /* enable fault injection after delay */
nvgpu_posix_enable_fault_injection(dma_fi, true, fail_after); nvgpu_posix_enable_fault_injection(dma_fi, true, FAIL_AFTER);
if (nvgpu_posix_is_fault_injection_triggered(dma_fi)) { if (nvgpu_posix_is_fault_injection_triggered(dma_fi)) {
unit_err(m, "Fault injection errantly enabled too soon\n"); unit_err(m, "Fault injection errantly enabled too soon\n");
ret = UNIT_FAIL; ret = UNIT_FAIL;
@@ -185,17 +185,17 @@ int test_dma_alloc_fi_delayed_enable(struct unit_module *m,
} }
call_count = 1; call_count = 1;
while (call_count <= (fail_after+1)){ while (call_count <= (FAIL_AFTER+1)) {
result = nvgpu_dma_alloc(g, TEST_DEFAULT_SIZE, result = nvgpu_dma_alloc(g, TEST_DEFAULT_SIZE,
&mem[call_count-1]); &mem[call_count-1]);
if ((call_count <= fail_after) && (result != 0U)) { if ((call_count <= FAIL_AFTER) && (result != 0U)) {
unit_err(m, "nvgpu_dma_alloc returned error when fault " unit_err(m, "nvgpu_dma_alloc returned error when fault "
"injection disabled\n"); "injection disabled\n");
ret = UNIT_FAIL; ret = UNIT_FAIL;
/* no reason to go on */ /* no reason to go on */
break; break;
} else if ((call_count > fail_after) && (result == 0U)) { } else if ((call_count > FAIL_AFTER) && (result == 0U)) {
unit_err(m, "nvgpu_dma_alloc returned success when " unit_err(m, "nvgpu_dma_alloc returned success when "
"fault injection enabled\n"); "fault injection enabled\n");
ret = UNIT_FAIL; ret = UNIT_FAIL;

6
userspace/units/pramin/nvgpu-pramin.c
View File

@@ -272,7 +272,7 @@ static int test_pramin_rd_n_single(struct unit_module *m, struct gk20a *g,
void *__args) void *__args)
{ {
u32 *dest; u32 *dest;
struct nvgpu_mem mem; struct nvgpu_mem mem = { };
struct nvgpu_mem_sgl *sgl; struct nvgpu_mem_sgl *sgl;
u32 byte_cnt = TEST_SIZE; u32 byte_cnt = TEST_SIZE;
bool success = false; bool success = false;
@@ -336,7 +336,7 @@ static int test_pramin_wr_n_multi(struct unit_module *m, struct gk20a *g,
void *__args) void *__args)
{ {
u32 *src; u32 *src;
struct nvgpu_mem mem; struct nvgpu_mem mem = { };
struct nvgpu_mem_sgl *sgl1, *sgl2, *sgl3; struct nvgpu_mem_sgl *sgl1, *sgl2, *sgl3;
u32 byte_cnt = TEST_SIZE; u32 byte_cnt = TEST_SIZE;
u32 byte_offset = SZ_128K; u32 byte_offset = SZ_128K;
@@ -425,7 +425,7 @@ free_src:
static int test_pramin_memset(struct unit_module *m, struct gk20a *g, static int test_pramin_memset(struct unit_module *m, struct gk20a *g,
void *__args) void *__args)
{ {
struct nvgpu_mem mem; struct nvgpu_mem mem = { };
struct nvgpu_mem_sgl *sgl; struct nvgpu_mem_sgl *sgl;
u32 byte_cnt = TEST_SIZE; u32 byte_cnt = TEST_SIZE;
u32 word_cnt = byte_cnt / sizeof(u32); u32 word_cnt = byte_cnt / sizeof(u32);