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gpu: nvgpu: unit: initialize nvgpu_mem variables
There were several places were nvgpu_mem structs were declared on the stack and not initialized. Some fields could be used erroneously by underlying APIs. To allow the initialization of an array of nvgpu_mem in test_dma_alloc_fi_delayed_enable(), the array length had to be changed from a const to a macro. JIRA NVGPU-1563 Change-Id: I6c23445af7d932710898df2e23a8fd892bee77b3 Signed-off-by: Philip Elcan <pelcan@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1967966 Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Alex Waterman <alexw@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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@@ -72,7 +72,7 @@ static int test_nvgpu_sgt_basic_apis(struct unit_module *m, struct gk20a *g,
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{
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int ret = UNIT_SUCCESS;
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struct nvgpu_os_posix *p = nvgpu_os_posix_from_gk20a(g);
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struct nvgpu_mem mem;
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struct nvgpu_mem mem = { };
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struct nvgpu_sgt *sgt;
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struct nvgpu_mem_sgl *sgl;
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struct nvgpu_sgt_ops const *saved_ops_ptr;
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@@ -404,7 +404,7 @@ static int test_nvgpu_sgt_alignment_with_iommu(struct unit_module *m,
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{
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int ret = UNIT_SUCCESS;
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struct nvgpu_os_posix *p = nvgpu_os_posix_from_gk20a(g);
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struct nvgpu_mem mem;
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struct nvgpu_mem mem = { };
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struct nvgpu_sgt *sgt;
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struct nvgpu_mem_sgl *sgl;
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u64 alignment;
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@@ -344,7 +344,7 @@ static u64 pte_get_phys_addr(u32 *pte)
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static int test_nvgpu_gmmu_map_unmap(struct unit_module *m,
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struct gk20a *g, void *args)
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{
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struct nvgpu_mem mem;
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struct nvgpu_mem mem = { };
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u32 pte[2];
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int result;
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struct nvgpu_os_posix *p = nvgpu_os_posix_from_gk20a(g);
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@@ -443,7 +443,7 @@ static int test_nvgpu_gmmu_map_unmap(struct unit_module *m,
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static int test_nvgpu_gmmu_set_pte(struct unit_module *m,
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struct gk20a *g, void *args)
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{
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struct nvgpu_mem mem;
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struct nvgpu_mem mem = { };
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u32 pte[2];
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int result;
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struct nvgpu_os_posix *p = nvgpu_os_posix_from_gk20a(g);
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@@ -582,7 +582,7 @@ static void gmmu_unmap_advanced(struct vm_gk20a *vm, struct nvgpu_mem *mem,
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static int test_nvgpu_gmmu_map_unmap_adv(struct unit_module *m,
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struct gk20a *g, void *args)
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{
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struct nvgpu_mem mem;
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struct nvgpu_mem mem = { };
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u64 vaddr;
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struct test_parameters *params = (struct test_parameters *) args;
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@@ -609,7 +609,7 @@ static int test_nvgpu_gmmu_map_unmap_adv(struct unit_module *m,
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static int test_nvgpu_gmmu_map_unmap_batched(struct unit_module *m,
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struct gk20a *g, void *args)
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{
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struct nvgpu_mem mem, mem2;
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struct nvgpu_mem mem = { }, mem2 = { };
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u64 vaddr, vaddr2;
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struct vm_gk20a_mapping_batch batch;
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@@ -74,7 +74,7 @@ int test_dma_alloc_init(struct unit_module *m,
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int test_dma_alloc_fi_default(struct unit_module *m,
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struct gk20a *g, void *__args)
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{
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struct nvgpu_mem mem;
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struct nvgpu_mem mem = { };
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int result;
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int ret = UNIT_SUCCESS;
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@@ -118,7 +118,7 @@ test_exit:
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int test_dma_alloc_fi_enabled(struct unit_module *m,
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struct gk20a *g, void *__args)
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{
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struct nvgpu_mem mem;
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struct nvgpu_mem mem = { };
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int result;
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int ret = UNIT_SUCCESS;
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@@ -164,9 +164,9 @@ test_exit:
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int test_dma_alloc_fi_delayed_enable(struct unit_module *m,
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struct gk20a *g, void *__args)
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{
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const unsigned int fail_after = 2;
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#define FAIL_AFTER 2
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unsigned int call_count = 0;
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struct nvgpu_mem mem[fail_after+1];
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struct nvgpu_mem mem[FAIL_AFTER+1] = { };
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int result = 0;
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int ret = UNIT_SUCCESS;
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@@ -177,7 +177,7 @@ int test_dma_alloc_fi_delayed_enable(struct unit_module *m,
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}
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/* enable fault injection after delay */
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nvgpu_posix_enable_fault_injection(dma_fi, true, fail_after);
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nvgpu_posix_enable_fault_injection(dma_fi, true, FAIL_AFTER);
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if (nvgpu_posix_is_fault_injection_triggered(dma_fi)) {
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unit_err(m, "Fault injection errantly enabled too soon\n");
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ret = UNIT_FAIL;
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@@ -185,17 +185,17 @@ int test_dma_alloc_fi_delayed_enable(struct unit_module *m,
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}
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call_count = 1;
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while (call_count <= (fail_after+1)){
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while (call_count <= (FAIL_AFTER+1)) {
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result = nvgpu_dma_alloc(g, TEST_DEFAULT_SIZE,
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&mem[call_count-1]);
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if ((call_count <= fail_after) && (result != 0U)) {
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if ((call_count <= FAIL_AFTER) && (result != 0U)) {
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unit_err(m, "nvgpu_dma_alloc returned error when fault "
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"injection disabled\n");
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ret = UNIT_FAIL;
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/* no reason to go on */
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break;
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} else if ((call_count > fail_after) && (result == 0U)) {
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} else if ((call_count > FAIL_AFTER) && (result == 0U)) {
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unit_err(m, "nvgpu_dma_alloc returned success when "
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"fault injection enabled\n");
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ret = UNIT_FAIL;
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@@ -272,7 +272,7 @@ static int test_pramin_rd_n_single(struct unit_module *m, struct gk20a *g,
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void *__args)
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{
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u32 *dest;
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struct nvgpu_mem mem;
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struct nvgpu_mem mem = { };
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struct nvgpu_mem_sgl *sgl;
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u32 byte_cnt = TEST_SIZE;
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bool success = false;
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@@ -336,7 +336,7 @@ static int test_pramin_wr_n_multi(struct unit_module *m, struct gk20a *g,
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void *__args)
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{
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u32 *src;
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struct nvgpu_mem mem;
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struct nvgpu_mem mem = { };
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struct nvgpu_mem_sgl *sgl1, *sgl2, *sgl3;
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u32 byte_cnt = TEST_SIZE;
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u32 byte_offset = SZ_128K;
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@@ -425,7 +425,7 @@ free_src:
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static int test_pramin_memset(struct unit_module *m, struct gk20a *g,
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void *__args)
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{
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struct nvgpu_mem mem;
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struct nvgpu_mem mem = { };
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struct nvgpu_mem_sgl *sgl;
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u32 byte_cnt = TEST_SIZE;
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u32 word_cnt = byte_cnt / sizeof(u32);
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