gpu: nvgpu: ACR unit test

Add unit tests for ACR unit for the following
function:
nvgpu_acr_init()

JIRA NVGPU-2220

Change-Id: I40c6cf21439e1e9e376230b89cdae6740aec666b
Signed-off-by: Divya Singhatwaria <dsinghatwari@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2181677
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

Makefile.umbrella.tmk

@@ -75,6 +75,7 @@ NV_REPOSITORY_COMPONENTS += userspace/units/gr
 NV_REPOSITORY_COMPONENTS += userspace/units/gr/config
 NV_REPOSITORY_COMPONENTS += userspace/units/gr/init
 NV_REPOSITORY_COMPONENTS += userspace/units/gr/intr
+NV_REPOSITORY_COMPONENTS += userspace/units/acr
 endif
 
 # Local Variables:

drivers/gpu/nvgpu/libnvgpu-drv_safe.export

@@ -38,6 +38,7 @@ gv11b_mm_l2_flush
 gv11b_mm_mmu_fault_disable_hw
 gv11b_mm_mmu_fault_info_mem_destroy
 gv11b_mc_is_mmu_fault_pending
+nvgpu_acr_init
 nvgpu_alloc
 nvgpu_alloc_base
 nvgpu_alloc_common_init

userspace/Makefile.sources

@@ -82,4 +82,5 @@ UNITS :=				\
 	$(UNIT_SRC)/gr			\
 	$(UNIT_SRC)/gr/config		\
 	$(UNIT_SRC)/gr/init		\
-	$(UNIT_SRC)/gr/intr
+	$(UNIT_SRC)/gr/intr	\
+	$(UNIT_SRC)/acr

userspace/SWUTS.h

@@ -49,5 +49,7 @@
  *   - @ref SWUTS-posix-thread
  *   - @ref SWUTS-posix-timers
  *   - @ref SWUTS-sdl
+ *   - @ref SWUTS-acr
  *
  */
+

userspace/SWUTS.sources

@@ -21,3 +21,4 @@ INPUT += ../../../userspace/units/posix/fault-injection/posix-fault-injection-dm
 INPUT += ../../../userspace/units/posix/sizes/posix-sizes.h
 INPUT += ../../../userspace/units/posix/thread/posix-thread.h
 INPUT += ../../../userspace/units/posix/timers/posix-timers.h
+INPUT += ../../../userspace/units/acr/nvgpu-acr.h

userspace/required_tests.json

@@ -1502,5 +1502,17 @@
         "test": "gr_intr_cleanup",
         "test_level": 0,
         "unit": "nvgpu_gr_intr"
+    },
+    {
+       "test": "acr_init",
+       "test_level": 0,
+       "unit": "nvgpu-acr"
+    },
+    {
+      "test": "acr_free_falcon_test_env",
+      "test_level": 0,
+      "unit": "nvgpu-acr"
     }
+
+
 ]

userspace/units/acr/Makefile

@@ -0,0 +1,33 @@
+# Copyright (c) 2019, NVIDIA CORPORATION.  All rights reserved.
+#
+# Permission is hereby granted, free of charge, to any person obtaining a
+# copy of this software and associated documentation files (the "Software"),
+# to deal in the Software without restriction, including without limitation
+# the rights to use, copy, modify, merge, publish, distribute, sublicense,
+# and/or sell copies of the Software, and to permit persons to whom the
+# Software is furnished to do so, subject to the following conditions:
+#
+# The above copyright notice and this permission notice shall be included in
+# all copies or substantial portions of the Software.
+#
+# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+# THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+# FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+# DEALINGS IN THE SOFTWARE.
+
+.SUFFIXES:
+
+OBJS   = nvgpu-acr.o
+MODULE = nvgpu-acr
+
+LIB_PATHS += -lfalcon_utf
+
+include ../Makefile.units
+
+lib$(MODULE).so: falcon_utf
+
+falcon_utf:
+	$(MAKE) -C ../falcon

userspace/units/acr/Makefile.interface.tmk

@@ -0,0 +1,35 @@
+################################### tell Emacs this is a -*- makefile-gmake -*-
+#
+# Copyright (c) 2019, NVIDIA CORPORATION.  All rights reserved.
+#
+# Permission is hereby granted, free of charge, to any person obtaining a
+# copy of this software and associated documentation files (the "Software"),
+# to deal in the Software without restriction, including without limitation
+# the rights to use, copy, modify, merge, publish, distribute, sublicense,
+# and/or sell copies of the Software, and to permit persons to whom the
+# Software is furnished to do so, subject to the following conditions:
+#
+# The above copyright notice and this permission notice shall be included in
+# all copies or substantial portions of the Software.
+#
+# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+# THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+# FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+# DEALINGS IN THE SOFTWARE.
+#
+# tmake for SW Mobile component makefile
+#
+###############################################################################
+
+NVGPU_UNIT_NAME=nvgpu-acr
+
+include $(NV_COMPONENT_DIR)/../Makefile.units.common.interface.tmk
+
+# Local Variables:
+# indent-tabs-mode: t
+# tab-width: 8
+# End:
+# vi: set tabstop=8 noexpandtab:

userspace/units/acr/Makefile.tmk

@@ -0,0 +1,41 @@
+################################## tell Emacs this is a -*- makefile-gmake -*-
+#
+# Copyright (c) 2019, NVIDIA CORPORATION.  All rights reserved.
+#
+# Permission is hereby granted, free of charge, to any person obtaining a
+# copy of this software and associated documentation files (the "Software"),
+# to deal in the Software without restriction, including without limitation
+# the rights to use, copy, modify, merge, publish, distribute, sublicense,
+# and/or sell copies of the Software, and to permit persons to whom the
+# Software is furnished to do so, subject to the following conditions:
+#
+# The above copyright notice and this permission notice shall be included in
+# all copies or substantial portions of the Software.
+#
+# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+# THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+# FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+# DEALINGS IN THE SOFTWARE.
+#
+# tmake for SW Mobile component makefile
+#
+###############################################################################
+
+NVGPU_UNIT_NAME=nvgpu-acr
+NVGPU_UNIT_SRCS=nvgpu-acr.c
+
+NVGPU_UNIT_INTERFACE_DIRS := \
+	$(NV_COMPONENT_DIR)/../falcon \
+	$(NV_SOURCE)/kernel/nvgpu/drivers/gpu/nvgpu
+
+include $(NV_COMPONENT_DIR)/../Makefile.units.common.tmk
+
+# Local Variables:
+# indent-tabs-mode: t
+# tab-width: 8
+# End:
+# vi: set tabstop=8 noexpandtab:
+

userspace/units/acr/nvgpu-acr.c

@@ -0,0 +1,253 @@
+/*
+ * Copyright (c) 2019, NVIDIA CORPORATION.  All rights reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ */
+#include <stdlib.h>
+#include <unit/unit.h>
+#include <unit/io.h>
+#include <nvgpu/types.h>
+#include <nvgpu/acr.h>
+#include <nvgpu/falcon.h>
+#include <nvgpu/gk20a.h>
+#include <nvgpu/pmu.h>
+#include <nvgpu/hal_init.h>
+#include <nvgpu/posix/io.h>
+#include <nvgpu/posix/posix-fault-injection.h>
+
+#include <nvgpu/hw/gv11b/hw_fuse_gv11b.h>
+
+#include "nvgpu-acr.h"
+#include "../falcon/falcon_utf.h"
+
+struct utf_falcon *pmu_flcn;
+
+#define NV_PMC_BOOT_0_ARCHITECTURE_GV110        (0x00000015 << \
+						NVGPU_GPU_ARCHITECTURE_SHIFT)
+#define NV_PMC_BOOT_0_IMPLEMENTATION_B          0xB
+
+#define NV_PMC_BOOT_0_ARCHITECTURE_INVALID	(0x00000018 << \
+						NVGPU_GPU_ARCHITECTURE_SHIFT)
+#define NV_PMC_BOOT_0_IMPLEMENTATION_INVALID	0xD
+
+static struct utf_falcon *pmu_flcn_from_addr(struct gk20a *g, u32 addr)
+{
+	struct utf_falcon *flcn = NULL;
+	u32 flcn_base;
+
+	if (pmu_flcn == NULL || pmu_flcn->flcn == NULL) {
+		return NULL;
+	}
+
+	flcn_base = pmu_flcn->flcn->flcn_base;
+	if ((addr >= flcn_base) &&
+	    (addr < (flcn_base + UTF_FALCON_MAX_REG_OFFSET))) {
+		flcn = pmu_flcn;
+	}
+
+	return flcn;
+}
+
+static void writel_access_reg_fn(struct gk20a *g,
+				 struct nvgpu_reg_access *access)
+{
+	struct utf_falcon *flcn = NULL;
+
+	flcn = pmu_flcn_from_addr(g, access->addr);
+	if (flcn != NULL) {
+		nvgpu_utf_falcon_writel_access_reg_fn(g, flcn, access);
+	} else {
+		nvgpu_posix_io_writel_reg_space(g, access->addr, access->value);
+	}
+	nvgpu_posix_io_record_access(g, access);
+}
+
+static void readl_access_reg_fn(struct gk20a *g,
+				struct nvgpu_reg_access *access)
+{
+	struct utf_falcon *flcn = NULL;
+
+	flcn = pmu_flcn_from_addr(g, access->addr);
+	if (flcn != NULL) {
+		nvgpu_utf_falcon_readl_access_reg_fn(g, flcn, access);
+	} else {
+		access->value = nvgpu_posix_io_readl_reg_space(g, access->addr);
+	}
+}
+
+static struct nvgpu_posix_io_callbacks utf_falcon_reg_callbacks = {
+	.writel          = writel_access_reg_fn,
+	.writel_check    = writel_access_reg_fn,
+	.bar1_writel     = writel_access_reg_fn,
+	.usermode_writel = writel_access_reg_fn,
+
+	.__readl         = readl_access_reg_fn,
+	.readl           = readl_access_reg_fn,
+	.bar1_readl      = readl_access_reg_fn,
+};
+
+static void utf_falcon_register_io(struct gk20a *g)
+{
+	nvgpu_posix_register_io(g, &utf_falcon_reg_callbacks);
+}
+
+static int init_acr_falcon_test_env(struct unit_module *m, struct gk20a *g)
+{
+	int err = 0;
+
+	nvgpu_posix_io_init_reg_space(g);
+	utf_falcon_register_io(g);
+
+	/*
+	 * Fuse register fuse_opt_priv_sec_en_r() is read during init_hal hence
+	 * add it to reg space
+	 */
+	if (nvgpu_posix_io_add_reg_space(g,
+					fuse_opt_priv_sec_en_r(), 0x4) != 0) {
+		unit_err(m, "Add reg space failed!\n");
+		return -ENOMEM;
+	}
+
+	/*
+	 * HAL init parameters for gv11b
+	 */
+	g->params.gpu_arch = NV_PMC_BOOT_0_ARCHITECTURE_GV110;
+	g->params.gpu_impl = NV_PMC_BOOT_0_IMPLEMENTATION_B;
+
+	/*
+	 * HAL init required for getting
+	 * the falcon ops initialized.
+	 */
+	err = nvgpu_init_hal(g);
+	if (err != 0) {
+		return -ENODEV;
+	}
+
+	/*
+	 * Initialize utf & nvgpu falcon
+	 * for test usage
+	 */
+	pmu_flcn = nvgpu_utf_falcon_init(m, g, FALCON_ID_PMU);
+	if (pmu_flcn == NULL) {
+		return -ENODEV;
+	}
+
+	return 0;
+}
+
+int test_acr_init(struct unit_module *m,
+				struct gk20a *g, void *args)
+{
+	int err;
+	struct nvgpu_posix_fault_inj *kmem_fi =
+		nvgpu_kmem_get_fault_injection();
+
+	/*
+	 * initialize falcon
+	 */
+	if (init_acr_falcon_test_env(m, g) != 0) {
+		unit_return_fail(m, "Module init failed\n");
+	}
+
+	/*
+	 * initialize PMU
+	 */
+	err =  nvgpu_pmu_early_init(g, &g->pmu);
+	if (err != 0) {
+		unit_return_fail(m, "nvgpu_pmu_early_init failed\n");
+	}
+
+	/*
+	 * Case 1: nvgpu_acr_init() fails
+	 * due to memory allocation failure
+	 */
+	nvgpu_posix_enable_fault_injection(kmem_fi, true, 0);
+	err = nvgpu_acr_init(g, &g->acr);
+
+	if (err != -ENOMEM) {
+		unit_return_fail(m,
+			"Memory allocation failure for nvgpu_acr_init() \
+			didn't happen as expected\n");
+	}
+	nvgpu_posix_enable_fault_injection(kmem_fi, false, 0);
+
+	/* Case 2: nvgpu_acr_init() fails due to wrong
+	 * version of the chips
+	 */
+
+	/*
+	 * giving incorrect chip id
+	 */
+	g->params.gpu_arch = NV_PMC_BOOT_0_ARCHITECTURE_INVALID;
+	g->params.gpu_impl = NV_PMC_BOOT_0_IMPLEMENTATION_INVALID;
+
+	err = nvgpu_acr_init(g, &g->acr);
+	if (err != -EINVAL) {
+		unit_return_fail(m, "Version failure of chip for \
+				nvgpu_acr_init() didn't happen as expected\n");
+	}
+
+	/*
+	 * Case 3: nvgpu_acr_init() passes
+	 */
+
+	/*
+	 * HAL init parameters for gv11b
+	 */
+	g->params.gpu_arch = NV_PMC_BOOT_0_ARCHITECTURE_GV110;
+	g->params.gpu_impl = NV_PMC_BOOT_0_IMPLEMENTATION_B;
+
+	err = nvgpu_acr_init(g, &g->acr);
+	if (err != 0) {
+		unit_return_fail(m, "nvgpu_acr_init() failed\n");
+	}
+
+	return UNIT_SUCCESS;
+}
+
+int free_falcon_test_env(struct unit_module *m, struct gk20a *g,
+					void *__args)
+{
+	if (pmu_flcn == NULL) {
+		unit_return_fail(m, "test environment not initialized.");
+	}
+
+	/*
+	 * Uninitialize the PMU after
+	 * the test is done
+	 */
+	nvgpu_pmu_remove_support(g, g->pmu);
+	if (g->pmu != NULL) {
+		unit_return_fail(m, "nvgpu_pmu_remove_support failed\n");
+	}
+
+	/*
+	 * Free the falcon test environment
+	 */
+	nvgpu_utf_falcon_free(g, pmu_flcn);
+	return UNIT_SUCCESS;
+}
+
+struct unit_module_test nvgpu_acr_tests[] = {
+	UNIT_TEST(acr_init, test_acr_init, NULL, 0),
+	UNIT_TEST(acr_free_falcon_test_env, free_falcon_test_env, NULL, 0),
+
+};
+
+UNIT_MODULE(nvgpu-acr, nvgpu_acr_tests, UNIT_PRIO_NVGPU_TEST);

userspace/units/acr/nvgpu-acr.h

@@ -0,0 +1,72 @@
+/*
+ * Copyright (c) 2019, NVIDIA CORPORATION.  All rights reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ */
+
+struct gk20a;
+struct unit_module;
+
+/** @addtogroup SWUTS-acr
+ *  @{
+ *
+ * Software Unit Test Specification for acr
+ */
+
+/**
+ * Test specification for: test_acr_init
+ *
+ * Description: The test_acr_init shall test the initialisation of
+ * the ACR unit
+ *
+ * Test Type: Feature based
+ *
+ * Input: None
+ *
+ * Steps:
+ * - Initialize the falcon test environment
+ * - Initialize the PMU
+ * - Inject memory allocation fault to test the fail scenario 1
+ * - Give incorrect chip version to test the fail scenario 2
+ * - Give correct chip id and test the pass scenario
+ * - Uninitialize the PMU support
+ *
+ * Output: Returns PASS if the steps above were executed successfully. FAIL
+ * otherwise.
+ */
+int test_acr_init(struct unit_module *m, struct gk20a *g, void *args);
+
+/**
+ * Test specification for: free_falcon_test_env
+ *
+ * Description: The free_falcon_test_env shall free up the falcon
+ * test environment.
+ *
+ * Test Type: Feature based
+ *
+ * Input: None
+ *
+ * Steps:
+ * - Free up the space allocated for utf_flcn (both imem and dmem)
+ * - Free up the register space
+ *
+ * Output: Returns PASS if the steps above were executed successfully.
+ *
+ */
+int free_falcon_test_env(struct unit_module *m, struct gk20a *g, void *__args);