diff --git a/drivers/gpu/nvgpu/common/linux/ioctl_channel.c b/drivers/gpu/nvgpu/common/linux/ioctl_channel.c index f59478287..6feb6fb70 100644 --- a/drivers/gpu/nvgpu/common/linux/ioctl_channel.c +++ b/drivers/gpu/nvgpu/common/linux/ioctl_channel.c @@ -45,7 +45,7 @@ static const char *gr_gk20a_graphics_preempt_mode_name(u32 graphics_preempt_mode) { switch (graphics_preempt_mode) { - case NVGPU_GRAPHICS_PREEMPTION_MODE_WFI: + case NVGPU_PREEMPTION_MODE_GRAPHICS_WFI: return "WFI"; default: return "?"; @@ -55,9 +55,9 @@ static const char *gr_gk20a_graphics_preempt_mode_name(u32 graphics_preempt_mode static const char *gr_gk20a_compute_preempt_mode_name(u32 compute_preempt_mode) { switch (compute_preempt_mode) { - case NVGPU_COMPUTE_PREEMPTION_MODE_WFI: + case NVGPU_PREEMPTION_MODE_COMPUTE_WFI: return "WFI"; - case NVGPU_COMPUTE_PREEMPTION_MODE_CTA: + case NVGPU_PREEMPTION_MODE_COMPUTE_CTA: return "CTA"; default: return "?"; @@ -991,6 +991,130 @@ static int nvgpu_ioctl_channel_alloc_obj_ctx(struct channel_gk20a *ch, nvgpu_obj_ctx_user_flags_to_common_flags(user_flags)); } +/* + * Convert common preemption mode flags of the form NVGPU_PREEMPTION_MODE_GRAPHICS_* + * into linux preemption mode flags of the form NVGPU_GRAPHICS_PREEMPTION_MODE_* + */ +u32 nvgpu_get_ioctl_graphics_preempt_mode_flags(u32 graphics_preempt_mode_flags) +{ + u32 flags = 0; + + if (graphics_preempt_mode_flags & NVGPU_PREEMPTION_MODE_GRAPHICS_WFI) + flags |= NVGPU_GRAPHICS_PREEMPTION_MODE_WFI; + if (graphics_preempt_mode_flags & NVGPU_PREEMPTION_MODE_GRAPHICS_GFXP) + flags |= NVGPU_GRAPHICS_PREEMPTION_MODE_GFXP; + + return flags; +} + +/* + * Convert common preemption mode flags of the form NVGPU_PREEMPTION_MODE_COMPUTE_* + * into linux preemption mode flags of the form NVGPU_COMPUTE_PREEMPTION_MODE_* + */ +u32 nvgpu_get_ioctl_compute_preempt_mode_flags(u32 compute_preempt_mode_flags) +{ + u32 flags = 0; + + if (compute_preempt_mode_flags & NVGPU_PREEMPTION_MODE_COMPUTE_WFI) + flags |= NVGPU_COMPUTE_PREEMPTION_MODE_WFI; + if (compute_preempt_mode_flags & NVGPU_PREEMPTION_MODE_COMPUTE_CTA) + flags |= NVGPU_COMPUTE_PREEMPTION_MODE_CTA; + if (compute_preempt_mode_flags & NVGPU_PREEMPTION_MODE_COMPUTE_CILP) + flags |= NVGPU_COMPUTE_PREEMPTION_MODE_CILP; + + return flags; +} + +/* + * Convert common preemption modes of the form NVGPU_PREEMPTION_MODE_GRAPHICS_* + * into linux preemption modes of the form NVGPU_GRAPHICS_PREEMPTION_MODE_* + */ +u32 nvgpu_get_ioctl_graphics_preempt_mode(u32 graphics_preempt_mode) +{ + switch (graphics_preempt_mode) { + case NVGPU_PREEMPTION_MODE_GRAPHICS_WFI: + return NVGPU_GRAPHICS_PREEMPTION_MODE_WFI; + case NVGPU_PREEMPTION_MODE_GRAPHICS_GFXP: + return NVGPU_GRAPHICS_PREEMPTION_MODE_GFXP; + } + + return graphics_preempt_mode; +} + +/* + * Convert common preemption modes of the form NVGPU_PREEMPTION_MODE_COMPUTE_* + * into linux preemption modes of the form NVGPU_COMPUTE_PREEMPTION_MODE_* + */ +u32 nvgpu_get_ioctl_compute_preempt_mode(u32 compute_preempt_mode) +{ + switch (compute_preempt_mode) { + case NVGPU_PREEMPTION_MODE_COMPUTE_WFI: + return NVGPU_COMPUTE_PREEMPTION_MODE_WFI; + case NVGPU_PREEMPTION_MODE_COMPUTE_CTA: + return NVGPU_COMPUTE_PREEMPTION_MODE_CTA; + case NVGPU_PREEMPTION_MODE_COMPUTE_CILP: + return NVGPU_COMPUTE_PREEMPTION_MODE_CILP; + } + + return compute_preempt_mode; +} + +/* + * Convert linux preemption modes of the form NVGPU_GRAPHICS_PREEMPTION_MODE_* + * into common preemption modes of the form NVGPU_PREEMPTION_MODE_GRAPHICS_* + */ +static u32 nvgpu_get_common_graphics_preempt_mode(u32 graphics_preempt_mode) +{ + switch (graphics_preempt_mode) { + case NVGPU_GRAPHICS_PREEMPTION_MODE_WFI: + return NVGPU_PREEMPTION_MODE_GRAPHICS_WFI; + case NVGPU_GRAPHICS_PREEMPTION_MODE_GFXP: + return NVGPU_PREEMPTION_MODE_GRAPHICS_GFXP; + } + + return graphics_preempt_mode; +} + +/* + * Convert linux preemption modes of the form NVGPU_COMPUTE_PREEMPTION_MODE_* + * into common preemption modes of the form NVGPU_PREEMPTION_MODE_COMPUTE_* + */ +static u32 nvgpu_get_common_compute_preempt_mode(u32 compute_preempt_mode) +{ + switch (compute_preempt_mode) { + case NVGPU_COMPUTE_PREEMPTION_MODE_WFI: + return NVGPU_PREEMPTION_MODE_COMPUTE_WFI; + case NVGPU_COMPUTE_PREEMPTION_MODE_CTA: + return NVGPU_PREEMPTION_MODE_COMPUTE_CTA; + case NVGPU_COMPUTE_PREEMPTION_MODE_CILP: + return NVGPU_PREEMPTION_MODE_COMPUTE_CILP; + } + + return compute_preempt_mode; +} + +static int nvgpu_ioctl_channel_set_preemption_mode(struct channel_gk20a *ch, + u32 graphics_preempt_mode, u32 compute_preempt_mode) +{ + int err; + + if (ch->g->ops.gr.set_preemption_mode) { + err = gk20a_busy(ch->g); + if (err) { + nvgpu_err(ch->g, "failed to power on, %d", err); + return err; + } + err = ch->g->ops.gr.set_preemption_mode(ch, + nvgpu_get_common_graphics_preempt_mode(graphics_preempt_mode), + nvgpu_get_common_compute_preempt_mode(compute_preempt_mode)); + gk20a_idle(ch->g); + } else { + err = -EINVAL; + } + + return err; +} + long gk20a_channel_ioctl(struct file *filp, unsigned int cmd, unsigned long arg) { @@ -1302,21 +1426,9 @@ long gk20a_channel_ioctl(struct file *filp, gk20a_channel_get_timeslice(ch); break; case NVGPU_IOCTL_CHANNEL_SET_PREEMPTION_MODE: - if (ch->g->ops.gr.set_preemption_mode) { - err = gk20a_busy(ch->g); - if (err) { - dev_err(dev, - "%s: failed to host gk20a for ioctl cmd: 0x%x", - __func__, cmd); - break; - } - err = ch->g->ops.gr.set_preemption_mode(ch, - ((struct nvgpu_preemption_mode_args *)buf)->graphics_preempt_mode, - ((struct nvgpu_preemption_mode_args *)buf)->compute_preempt_mode); - gk20a_idle(ch->g); - } else { - err = -EINVAL; - } + err = nvgpu_ioctl_channel_set_preemption_mode(ch, + ((struct nvgpu_preemption_mode_args *)buf)->graphics_preempt_mode, + ((struct nvgpu_preemption_mode_args *)buf)->compute_preempt_mode); break; case NVGPU_IOCTL_CHANNEL_SET_BOOSTED_CTX: if (ch->g->ops.gr.set_boosted_ctx) { diff --git a/drivers/gpu/nvgpu/common/linux/ioctl_channel.h b/drivers/gpu/nvgpu/common/linux/ioctl_channel.h index 48caf9dfb..235d84ef9 100644 --- a/drivers/gpu/nvgpu/common/linux/ioctl_channel.h +++ b/drivers/gpu/nvgpu/common/linux/ioctl_channel.h @@ -32,4 +32,9 @@ extern const struct file_operations gk20a_channel_ops; u32 nvgpu_event_id_to_ioctl_channel_event_id(u32 event_id); u32 nvgpu_get_common_runlist_level(u32 level); + +u32 nvgpu_get_ioctl_graphics_preempt_mode_flags(u32 graphics_preempt_mode_flags); +u32 nvgpu_get_ioctl_compute_preempt_mode_flags(u32 compute_preempt_mode_flags); +u32 nvgpu_get_ioctl_graphics_preempt_mode(u32 graphics_preempt_mode); +u32 nvgpu_get_ioctl_compute_preempt_mode(u32 compute_preempt_mode); #endif diff --git a/drivers/gpu/nvgpu/common/linux/ioctl_ctrl.c b/drivers/gpu/nvgpu/common/linux/ioctl_ctrl.c index b77855f4b..58178ac31 100644 --- a/drivers/gpu/nvgpu/common/linux/ioctl_ctrl.c +++ b/drivers/gpu/nvgpu/common/linux/ioctl_ctrl.c @@ -194,6 +194,28 @@ static u64 nvgpu_ctrl_ioctl_gpu_characteristics_flags(struct gk20a *g) return ioctl_flags; } +static void nvgpu_set_preemption_mode_flags(struct gk20a *g, + struct nvgpu_gpu_characteristics *gpu) +{ + struct nvgpu_preemption_modes_rec preemption_mode_rec; + + g->ops.gr.get_preemption_mode_flags(g, &preemption_mode_rec); + + gpu->graphics_preemption_mode_flags = + nvgpu_get_ioctl_graphics_preempt_mode_flags( + preemption_mode_rec.graphics_preemption_mode_flags); + gpu->compute_preemption_mode_flags = + nvgpu_get_ioctl_compute_preempt_mode_flags( + preemption_mode_rec.compute_preemption_mode_flags); + + gpu->default_graphics_preempt_mode = + nvgpu_get_ioctl_graphics_preempt_mode( + preemption_mode_rec.default_graphics_preempt_mode); + gpu->default_compute_preempt_mode = + nvgpu_get_ioctl_compute_preempt_mode( + preemption_mode_rec.default_compute_preempt_mode); +} + static long gk20a_ctrl_ioctl_gpu_characteristics( struct gk20a *g, @@ -235,6 +257,8 @@ gk20a_ctrl_ioctl_gpu_characteristics( pgpu->max_css_buffer_size = g->gr.max_css_buffer_size; + nvgpu_set_preemption_mode_flags(g, pgpu); + if (request->gpu_characteristics_buf_size > 0) { size_t write_size = sizeof(*pgpu); diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.c b/drivers/gpu/nvgpu/gk20a/gk20a.c index 1d594d291..ab3d86bef 100644 --- a/drivers/gpu/nvgpu/gk20a/gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/gk20a.c @@ -468,16 +468,6 @@ int gk20a_init_gpu_characteristics(struct gk20a *g) if (g->ops.clk.get_maxrate) gpu->max_freq = g->ops.clk.get_maxrate(&g->clk); - g->ops.gr.get_preemption_mode_flags(g, &g->gr.preemption_mode_rec); - gpu->graphics_preemption_mode_flags = - g->gr.preemption_mode_rec.graphics_preemption_mode_flags; - gpu->compute_preemption_mode_flags = - g->gr.preemption_mode_rec.compute_preemption_mode_flags; - gpu->default_graphics_preempt_mode = - g->gr.preemption_mode_rec.default_graphics_preempt_mode; - gpu->default_compute_preempt_mode = - g->gr.preemption_mode_rec.default_compute_preempt_mode; - gpu->local_video_memory_size = g->mm.vidmem.size; gpu->pci_vendor_id = g->pci_vendor_id; diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.h b/drivers/gpu/nvgpu/gk20a/gr_gk20a.h index b437838ff..3377df5db 100644 --- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.h @@ -61,6 +61,13 @@ (PAGE_SIZE/(PATCH_CTX_SLOTS_REQUIRED_PER_ENTRY * sizeof(u32))) #define PATCH_CTX_ENTRIES_FROM_SIZE(size) (size/sizeof(u32)) +#define NVGPU_PREEMPTION_MODE_GRAPHICS_WFI (1 << 0) +#define NVGPU_PREEMPTION_MODE_GRAPHICS_GFXP (1 << 1) + +#define NVGPU_PREEMPTION_MODE_COMPUTE_WFI (1 << 0) +#define NVGPU_PREEMPTION_MODE_COMPUTE_CTA (1 << 1) +#define NVGPU_PREEMPTION_MODE_COMPUTE_CILP (1 << 2) + struct channel_gk20a; struct nvgpu_warpstate; @@ -403,7 +410,6 @@ struct gr_gk20a { bool sw_ready; bool skip_ucode_init; - struct nvgpu_preemption_modes_rec preemption_mode_rec; #ifdef CONFIG_ARCH_TEGRA_18x_SOC struct gr_t18x t18x; #endif diff --git a/drivers/gpu/nvgpu/gm20b/gr_gm20b.c b/drivers/gpu/nvgpu/gm20b/gr_gm20b.c index 20f8e0623..ef46c1ee9 100644 --- a/drivers/gpu/nvgpu/gm20b/gr_gm20b.c +++ b/drivers/gpu/nvgpu/gm20b/gr_gm20b.c @@ -870,7 +870,7 @@ int gr_gm20b_alloc_gr_ctx(struct gk20a *g, return err; if (class == MAXWELL_COMPUTE_B) - (*gr_ctx)->compute_preempt_mode = NVGPU_COMPUTE_PREEMPTION_MODE_CTA; + (*gr_ctx)->compute_preempt_mode = NVGPU_PREEMPTION_MODE_COMPUTE_CTA; gk20a_dbg_fn("done"); @@ -887,7 +887,7 @@ void gr_gm20b_update_ctxsw_preemption_mode(struct gk20a *g, gk20a_dbg_fn(""); - if (gr_ctx->compute_preempt_mode == NVGPU_COMPUTE_PREEMPTION_MODE_CTA) { + if (gr_ctx->compute_preempt_mode == NVGPU_PREEMPTION_MODE_COMPUTE_CTA) { gk20a_dbg_info("CTA: %x", cta_preempt_option); nvgpu_mem_wr(g, mem, ctxsw_prog_main_image_preemption_options_o(), @@ -1410,15 +1410,15 @@ int gr_gm20b_get_preemption_mode_flags(struct gk20a *g, struct nvgpu_preemption_modes_rec *preemption_modes_rec) { preemption_modes_rec->graphics_preemption_mode_flags = - NVGPU_GRAPHICS_PREEMPTION_MODE_WFI; + NVGPU_PREEMPTION_MODE_GRAPHICS_WFI; preemption_modes_rec->compute_preemption_mode_flags = ( - NVGPU_COMPUTE_PREEMPTION_MODE_WFI | - NVGPU_COMPUTE_PREEMPTION_MODE_CTA); + NVGPU_PREEMPTION_MODE_COMPUTE_WFI | + NVGPU_PREEMPTION_MODE_COMPUTE_CTA); preemption_modes_rec->default_graphics_preempt_mode = - NVGPU_GRAPHICS_PREEMPTION_MODE_WFI; + NVGPU_PREEMPTION_MODE_GRAPHICS_WFI; preemption_modes_rec->default_compute_preempt_mode = - NVGPU_COMPUTE_PREEMPTION_MODE_CTA; + NVGPU_PREEMPTION_MODE_COMPUTE_CTA; return 0; } diff --git a/drivers/gpu/nvgpu/gp106/gr_gp106.c b/drivers/gpu/nvgpu/gp106/gr_gp106.c index 1fb527d16..fea337e7b 100644 --- a/drivers/gpu/nvgpu/gp106/gr_gp106.c +++ b/drivers/gpu/nvgpu/gp106/gr_gp106.c @@ -141,23 +141,23 @@ int gr_gp106_set_ctxsw_preemption_mode(struct gk20a *g, int err = 0; if (class == PASCAL_B && g->gr.t18x.ctx_vars.force_preemption_gfxp) - graphics_preempt_mode = NVGPU_GRAPHICS_PREEMPTION_MODE_GFXP; + graphics_preempt_mode = NVGPU_PREEMPTION_MODE_GRAPHICS_GFXP; if (class == PASCAL_COMPUTE_B && g->gr.t18x.ctx_vars.force_preemption_cilp) - compute_preempt_mode = NVGPU_COMPUTE_PREEMPTION_MODE_CILP; + compute_preempt_mode = NVGPU_PREEMPTION_MODE_COMPUTE_CILP; /* check for invalid combinations */ if ((graphics_preempt_mode == 0) && (compute_preempt_mode == 0)) return -EINVAL; - if ((graphics_preempt_mode == NVGPU_GRAPHICS_PREEMPTION_MODE_GFXP) && - (compute_preempt_mode == NVGPU_COMPUTE_PREEMPTION_MODE_CILP)) + if ((graphics_preempt_mode == NVGPU_PREEMPTION_MODE_GRAPHICS_GFXP) && + (compute_preempt_mode == NVGPU_PREEMPTION_MODE_COMPUTE_CILP)) return -EINVAL; /* set preemption modes */ switch (graphics_preempt_mode) { - case NVGPU_GRAPHICS_PREEMPTION_MODE_GFXP: + case NVGPU_PREEMPTION_MODE_GRAPHICS_GFXP: { u32 spill_size = gr_gpc0_swdx_rm_spill_buffer_size_256b_default_v() * @@ -213,7 +213,7 @@ int gr_gp106_set_ctxsw_preemption_mode(struct gk20a *g, break; } - case NVGPU_GRAPHICS_PREEMPTION_MODE_WFI: + case NVGPU_PREEMPTION_MODE_GRAPHICS_WFI: gr_ctx->graphics_preempt_mode = graphics_preempt_mode; break; @@ -223,9 +223,9 @@ int gr_gp106_set_ctxsw_preemption_mode(struct gk20a *g, if (class == PASCAL_COMPUTE_B) { switch (compute_preempt_mode) { - case NVGPU_COMPUTE_PREEMPTION_MODE_WFI: - case NVGPU_COMPUTE_PREEMPTION_MODE_CTA: - case NVGPU_COMPUTE_PREEMPTION_MODE_CILP: + case NVGPU_PREEMPTION_MODE_COMPUTE_WFI: + case NVGPU_PREEMPTION_MODE_COMPUTE_CTA: + case NVGPU_PREEMPTION_MODE_COMPUTE_CILP: gr_ctx->compute_preempt_mode = compute_preempt_mode; break; default: diff --git a/drivers/gpu/nvgpu/gp10b/gr_gp10b.c b/drivers/gpu/nvgpu/gp10b/gr_gp10b.c index 559ea1598..08988ac8a 100644 --- a/drivers/gpu/nvgpu/gp10b/gr_gp10b.c +++ b/drivers/gpu/nvgpu/gp10b/gr_gp10b.c @@ -408,7 +408,7 @@ int gr_gp10b_commit_global_cb_manager(struct gk20a *g, gk20a_dbg_fn(""); - if (gr_ctx->graphics_preempt_mode == NVGPU_GRAPHICS_PREEMPTION_MODE_GFXP) { + if (gr_ctx->graphics_preempt_mode == NVGPU_PREEMPTION_MODE_GRAPHICS_GFXP) { attrib_size_in_chunk = gr->attrib_cb_default_size + (gr_gpc0_ppc0_cbm_beta_cb_size_v_gfxp_v() - gr_gpc0_ppc0_cbm_beta_cb_size_v_default_v()); @@ -941,18 +941,18 @@ int gr_gp10b_set_ctxsw_preemption_mode(struct gk20a *g, if (g->ops.gr.is_valid_gfx_class(g, class) && g->gr.t18x.ctx_vars.force_preemption_gfxp) - graphics_preempt_mode = NVGPU_GRAPHICS_PREEMPTION_MODE_GFXP; + graphics_preempt_mode = NVGPU_PREEMPTION_MODE_GRAPHICS_GFXP; if (g->ops.gr.is_valid_compute_class(g, class) && g->gr.t18x.ctx_vars.force_preemption_cilp) - compute_preempt_mode = NVGPU_COMPUTE_PREEMPTION_MODE_CILP; + compute_preempt_mode = NVGPU_PREEMPTION_MODE_COMPUTE_CILP; /* check for invalid combinations */ if ((graphics_preempt_mode == 0) && (compute_preempt_mode == 0)) return -EINVAL; - if ((graphics_preempt_mode == NVGPU_GRAPHICS_PREEMPTION_MODE_GFXP) && - (compute_preempt_mode == NVGPU_COMPUTE_PREEMPTION_MODE_CILP)) + if ((graphics_preempt_mode == NVGPU_PREEMPTION_MODE_GRAPHICS_GFXP) && + (compute_preempt_mode == NVGPU_PREEMPTION_MODE_COMPUTE_CILP)) return -EINVAL; /* Do not allow lower preemption modes than current ones */ @@ -966,7 +966,7 @@ int gr_gp10b_set_ctxsw_preemption_mode(struct gk20a *g, /* set preemption modes */ switch (graphics_preempt_mode) { - case NVGPU_GRAPHICS_PREEMPTION_MODE_GFXP: + case NVGPU_PREEMPTION_MODE_GRAPHICS_GFXP: { u32 spill_size = gr_gpc0_swdx_rm_spill_buffer_size_256b_default_v() * @@ -1022,7 +1022,7 @@ int gr_gp10b_set_ctxsw_preemption_mode(struct gk20a *g, break; } - case NVGPU_GRAPHICS_PREEMPTION_MODE_WFI: + case NVGPU_PREEMPTION_MODE_GRAPHICS_WFI: gr_ctx->graphics_preempt_mode = graphics_preempt_mode; break; @@ -1033,9 +1033,9 @@ int gr_gp10b_set_ctxsw_preemption_mode(struct gk20a *g, if (g->ops.gr.is_valid_compute_class(g, class) || g->ops.gr.is_valid_gfx_class(g, class)) { switch (compute_preempt_mode) { - case NVGPU_COMPUTE_PREEMPTION_MODE_WFI: - case NVGPU_COMPUTE_PREEMPTION_MODE_CTA: - case NVGPU_COMPUTE_PREEMPTION_MODE_CILP: + case NVGPU_PREEMPTION_MODE_COMPUTE_WFI: + case NVGPU_PREEMPTION_MODE_COMPUTE_CTA: + case NVGPU_PREEMPTION_MODE_COMPUTE_CILP: gr_ctx->compute_preempt_mode = compute_preempt_mode; break; default: @@ -1073,9 +1073,9 @@ int gr_gp10b_alloc_gr_ctx(struct gk20a *g, (*gr_ctx)->t18x.ctx_id_valid = false; if (flags & NVGPU_OBJ_CTX_FLAGS_SUPPORT_GFXP) - graphics_preempt_mode = NVGPU_GRAPHICS_PREEMPTION_MODE_GFXP; + graphics_preempt_mode = NVGPU_PREEMPTION_MODE_GRAPHICS_GFXP; if (flags & NVGPU_OBJ_CTX_FLAGS_SUPPORT_CILP) - compute_preempt_mode = NVGPU_COMPUTE_PREEMPTION_MODE_CILP; + compute_preempt_mode = NVGPU_PREEMPTION_MODE_COMPUTE_CILP; if (graphics_preempt_mode || compute_preempt_mode) { if (g->ops.gr.set_ctxsw_preemption_mode) { @@ -1190,21 +1190,21 @@ void gr_gp10b_update_ctxsw_preemption_mode(struct gk20a *g, gk20a_dbg_fn(""); - if (gr_ctx->graphics_preempt_mode == NVGPU_GRAPHICS_PREEMPTION_MODE_GFXP) { + if (gr_ctx->graphics_preempt_mode == NVGPU_PREEMPTION_MODE_GRAPHICS_GFXP) { gk20a_dbg_info("GfxP: %x", gfxp_preempt_option); nvgpu_mem_wr(g, mem, ctxsw_prog_main_image_graphics_preemption_options_o(), gfxp_preempt_option); } - if (gr_ctx->compute_preempt_mode == NVGPU_COMPUTE_PREEMPTION_MODE_CILP) { + if (gr_ctx->compute_preempt_mode == NVGPU_PREEMPTION_MODE_COMPUTE_CILP) { gk20a_dbg_info("CILP: %x", cilp_preempt_option); nvgpu_mem_wr(g, mem, ctxsw_prog_main_image_compute_preemption_options_o(), cilp_preempt_option); } - if (gr_ctx->compute_preempt_mode == NVGPU_COMPUTE_PREEMPTION_MODE_CTA) { + if (gr_ctx->compute_preempt_mode == NVGPU_PREEMPTION_MODE_COMPUTE_CTA) { gk20a_dbg_info("CTA: %x", cta_preempt_option); nvgpu_mem_wr(g, mem, ctxsw_prog_main_image_compute_preemption_options_o(), @@ -1835,7 +1835,7 @@ int gr_gp10b_pre_process_sm_exception(struct gk20a *g, if (fault_ch) cilp_enabled = (fault_ch->ch_ctx.gr_ctx->compute_preempt_mode == - NVGPU_COMPUTE_PREEMPTION_MODE_CILP); + NVGPU_PREEMPTION_MODE_COMPUTE_CILP); gk20a_dbg(gpu_dbg_fn | gpu_dbg_gpu_dbg, "SM Exception received on gpc %d tpc %d = %u\n", gpc, tpc, global_esr); @@ -2045,7 +2045,7 @@ static bool gr_gp10b_suspend_context(struct channel_gk20a *ch, if (gk20a_is_channel_ctx_resident(ch)) { g->ops.gr.suspend_all_sms(g, 0, false); - if (gr_ctx->compute_preempt_mode == NVGPU_COMPUTE_PREEMPTION_MODE_CILP) { + if (gr_ctx->compute_preempt_mode == NVGPU_PREEMPTION_MODE_COMPUTE_CILP) { err = gr_gp10b_set_cilp_preempt_pending(g, ch); if (err) nvgpu_err(g, "unable to set CILP preempt pending"); @@ -2278,17 +2278,17 @@ int gr_gp10b_get_preemption_mode_flags(struct gk20a *g, struct nvgpu_preemption_modes_rec *preemption_modes_rec) { preemption_modes_rec->graphics_preemption_mode_flags = ( - NVGPU_GRAPHICS_PREEMPTION_MODE_WFI | - NVGPU_GRAPHICS_PREEMPTION_MODE_GFXP); + NVGPU_PREEMPTION_MODE_GRAPHICS_WFI | + NVGPU_PREEMPTION_MODE_GRAPHICS_GFXP); preemption_modes_rec->compute_preemption_mode_flags = ( - NVGPU_COMPUTE_PREEMPTION_MODE_WFI | - NVGPU_COMPUTE_PREEMPTION_MODE_CTA | - NVGPU_COMPUTE_PREEMPTION_MODE_CILP); + NVGPU_PREEMPTION_MODE_COMPUTE_WFI | + NVGPU_PREEMPTION_MODE_COMPUTE_CTA | + NVGPU_PREEMPTION_MODE_COMPUTE_CILP); preemption_modes_rec->default_graphics_preempt_mode = - NVGPU_GRAPHICS_PREEMPTION_MODE_WFI; + NVGPU_PREEMPTION_MODE_GRAPHICS_WFI; preemption_modes_rec->default_compute_preempt_mode = - NVGPU_COMPUTE_PREEMPTION_MODE_WFI; + NVGPU_PREEMPTION_MODE_COMPUTE_WFI; return 0; } diff --git a/drivers/gpu/nvgpu/vgpu/gp10b/vgpu_gr_gp10b.c b/drivers/gpu/nvgpu/vgpu/gp10b/vgpu_gr_gp10b.c index fc8b16cbc..d3ad62802 100644 --- a/drivers/gpu/nvgpu/vgpu/gp10b/vgpu_gr_gp10b.c +++ b/drivers/gpu/nvgpu/vgpu/gp10b/vgpu_gr_gp10b.c @@ -80,16 +80,16 @@ int vgpu_gr_gp10b_alloc_gr_ctx(struct gk20a *g, gr_ctx = *__gr_ctx; if (flags & NVGPU_OBJ_CTX_FLAGS_SUPPORT_GFXP) - graphics_preempt_mode = NVGPU_GRAPHICS_PREEMPTION_MODE_GFXP; + graphics_preempt_mode = NVGPU_PREEMPTION_MODE_GRAPHICS_GFXP; if (flags & NVGPU_OBJ_CTX_FLAGS_SUPPORT_CILP) - compute_preempt_mode = NVGPU_COMPUTE_PREEMPTION_MODE_CILP; + compute_preempt_mode = NVGPU_PREEMPTION_MODE_COMPUTE_CILP; if (priv->constants.force_preempt_mode && !graphics_preempt_mode && !compute_preempt_mode) { graphics_preempt_mode = PASCAL_A == class ? - NVGPU_GRAPHICS_PREEMPTION_MODE_GFXP : 0; + NVGPU_PREEMPTION_MODE_GRAPHICS_GFXP : 0; compute_preempt_mode = PASCAL_COMPUTE_A == class ? - NVGPU_COMPUTE_PREEMPTION_MODE_CTA : 0; + NVGPU_PREEMPTION_MODE_COMPUTE_CTA : 0; } if (graphics_preempt_mode || compute_preempt_mode) { @@ -127,23 +127,23 @@ int vgpu_gr_gp10b_set_ctxsw_preemption_mode(struct gk20a *g, int err = 0; if (class == PASCAL_A && g->gr.t18x.ctx_vars.force_preemption_gfxp) - graphics_preempt_mode = NVGPU_GRAPHICS_PREEMPTION_MODE_GFXP; + graphics_preempt_mode = NVGPU_PREEMPTION_MODE_GRAPHICS_GFXP; if (class == PASCAL_COMPUTE_A && g->gr.t18x.ctx_vars.force_preemption_cilp) - compute_preempt_mode = NVGPU_COMPUTE_PREEMPTION_MODE_CILP; + compute_preempt_mode = NVGPU_PREEMPTION_MODE_COMPUTE_CILP; /* check for invalid combinations */ if ((graphics_preempt_mode == 0) && (compute_preempt_mode == 0)) return -EINVAL; - if ((graphics_preempt_mode == NVGPU_GRAPHICS_PREEMPTION_MODE_GFXP) && - (compute_preempt_mode == NVGPU_COMPUTE_PREEMPTION_MODE_CILP)) + if ((graphics_preempt_mode == NVGPU_PREEMPTION_MODE_GRAPHICS_GFXP) && + (compute_preempt_mode == NVGPU_PREEMPTION_MODE_COMPUTE_CILP)) return -EINVAL; /* set preemption modes */ switch (graphics_preempt_mode) { - case NVGPU_GRAPHICS_PREEMPTION_MODE_GFXP: + case NVGPU_PREEMPTION_MODE_GRAPHICS_GFXP: { u32 spill_size = gr_gpc0_swdx_rm_spill_buffer_size_256b_default_v() * @@ -213,11 +213,11 @@ int vgpu_gr_gp10b_set_ctxsw_preemption_mode(struct gk20a *g, desc->gpu_va; p->size[TEGRA_VGPU_GR_BIND_CTXSW_BUFFER_BETACB] = desc->size; - gr_ctx->graphics_preempt_mode = NVGPU_GRAPHICS_PREEMPTION_MODE_GFXP; + gr_ctx->graphics_preempt_mode = NVGPU_PREEMPTION_MODE_GRAPHICS_GFXP; p->mode = TEGRA_VGPU_GR_CTXSW_PREEMPTION_MODE_GFX_GFXP; break; } - case NVGPU_GRAPHICS_PREEMPTION_MODE_WFI: + case NVGPU_PREEMPTION_MODE_GRAPHICS_WFI: gr_ctx->graphics_preempt_mode = graphics_preempt_mode; break; @@ -227,20 +227,20 @@ int vgpu_gr_gp10b_set_ctxsw_preemption_mode(struct gk20a *g, if (class == PASCAL_COMPUTE_A) { switch (compute_preempt_mode) { - case NVGPU_COMPUTE_PREEMPTION_MODE_WFI: + case NVGPU_PREEMPTION_MODE_COMPUTE_WFI: gr_ctx->compute_preempt_mode = - NVGPU_COMPUTE_PREEMPTION_MODE_WFI; + NVGPU_PREEMPTION_MODE_COMPUTE_WFI; p->mode = TEGRA_VGPU_GR_CTXSW_PREEMPTION_MODE_WFI; break; - case NVGPU_COMPUTE_PREEMPTION_MODE_CTA: + case NVGPU_PREEMPTION_MODE_COMPUTE_CTA: gr_ctx->compute_preempt_mode = - NVGPU_COMPUTE_PREEMPTION_MODE_CTA; + NVGPU_PREEMPTION_MODE_COMPUTE_CTA; p->mode = TEGRA_VGPU_GR_CTXSW_PREEMPTION_MODE_COMPUTE_CTA; break; - case NVGPU_COMPUTE_PREEMPTION_MODE_CILP: + case NVGPU_PREEMPTION_MODE_COMPUTE_CILP: gr_ctx->compute_preempt_mode = - NVGPU_COMPUTE_PREEMPTION_MODE_CILP; + NVGPU_PREEMPTION_MODE_COMPUTE_CILP; p->mode = TEGRA_VGPU_GR_CTXSW_PREEMPTION_MODE_COMPUTE_CILP; break;