diff --git a/drivers/gpu/nvgpu/vgpu/gp10b/vgpu_gr_gp10b.c b/drivers/gpu/nvgpu/vgpu/gp10b/vgpu_gr_gp10b.c
index cac1db29d..234d8a694 100644
--- a/drivers/gpu/nvgpu/vgpu/gp10b/vgpu_gr_gp10b.c
+++ b/drivers/gpu/nvgpu/vgpu/gp10b/vgpu_gr_gp10b.c
@@ -309,6 +309,7 @@ static int vgpu_gr_gp10b_set_preemption_mode(struct channel_gk20a *ch,
 
 static int vgpu_gr_gp10b_init_ctx_state(struct gk20a *g)
 {
+	struct vgpu_priv_data *priv = vgpu_get_priv_data(g);
 	int err;
 
 	gk20a_dbg_fn("");
@@ -317,11 +318,10 @@ static int vgpu_gr_gp10b_init_ctx_state(struct gk20a *g)
 	if (err)
 		return err;
 
-	vgpu_get_attribute(vgpu_get_handle(g),
-			TEGRA_VGPU_ATTRIB_PREEMPT_CTX_SIZE,
-			&g->gr.t18x.ctx_vars.preempt_image_size);
+	g->gr.t18x.ctx_vars.preempt_image_size =
+			priv->constants.preempt_ctx_size;
 	if (!g->gr.t18x.ctx_vars.preempt_image_size)
-		return -ENXIO;
+		return -EINVAL;
 
 	return 0;
 }
diff --git a/include/linux/tegra_vgpu.h b/include/linux/tegra_vgpu.h
index 5d4fa36ac..daef7d985 100644
--- a/include/linux/tegra_vgpu.h
+++ b/include/linux/tegra_vgpu.h
@@ -114,32 +114,6 @@ struct tegra_vgpu_channel_hwctx_params {
 	u64 handle;
 };
 
-enum {
-	TEGRA_VGPU_ATTRIB_NUM_CHANNELS = 0, /*deprecated */
-	TEGRA_VGPU_ATTRIB_GOLDEN_CTX_SIZE = 1, /* deprecated */
-	TEGRA_VGPU_ATTRIB_ZCULL_CTX_SIZE = 2, /* deprecated */
-	TEGRA_VGPU_ATTRIB_COMPTAG_LINES = 3, /* deprecated */
-	TEGRA_VGPU_ATTRIB_GPC_COUNT = 4, /* deprecated */
-	TEGRA_VGPU_ATTRIB_MAX_TPC_PER_GPC_COUNT = 5, /* deprecated */
-	TEGRA_VGPU_ATTRIB_MAX_TPC_COUNT = 6, /* deprecated */
-	TEGRA_VGPU_ATTRIB_PMC_BOOT_0 = 7, /* deprecated */
-	TEGRA_VGPU_ATTRIB_L2_SIZE = 8, /* deprecated */
-	TEGRA_VGPU_ATTRIB_GPC0_TPC0_SM_ARCH = 9, /* deprecated */
-	TEGRA_VGPU_ATTRIB_NUM_FBPS = 10, /* deprecated */
-	TEGRA_VGPU_ATTRIB_FBP_EN_MASK = 11, /* deprecated */
-	TEGRA_VGPU_ATTRIB_MAX_LTC_PER_FBP = 12, /* deprecated */
-	TEGRA_VGPU_ATTRIB_MAX_LTS_PER_LTC = 13, /* deprecated */
-	TEGRA_VGPU_ATTRIB_GPC0_TPC_MASK = 14, /* deprecated */
-	TEGRA_VGPU_ATTRIB_CACHELINE_SIZE = 15, /* deprecated */
-	TEGRA_VGPU_ATTRIB_COMPTAGS_PER_CACHELINE = 16, /* deprecated */
-	TEGRA_VGPU_ATTRIB_SLICES_PER_LTC = 17, /* deprecated */
-	TEGRA_VGPU_ATTRIB_LTC_COUNT = 18, /* deprecated */
-	TEGRA_VGPU_ATTRIB_TPC_COUNT = 19, /* deprecated */
-	TEGRA_VGPU_ATTRIB_GPC0_TPC_COUNT = 20, /* deprecated */
-	TEGRA_VGPU_ATTRIB_MAX_FREQ = 21, /* deprecated */
-	TEGRA_VGPU_ATTRIB_PREEMPT_CTX_SIZE = 64, /* gap to hide T18x IP */
-};
-
 struct tegra_vgpu_attrib_params {
 	u32 attrib;
 	u32 value;
@@ -458,6 +432,7 @@ struct tegra_vgpu_constants_params {
 	u32 hwpm_ctx_size;
 	u8 force_preempt_mode;
 	u32 default_timeslice_us;
+	u32 preempt_ctx_size;
 };
 
 struct tegra_vgpu_channel_cyclestats_snapshot_params {