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gpu: nvgpu: unit: fifo: channel unit test
This unit test covers remainder of the nvgpu.common.fifo.channel module lines and branches. Jira NVGPU-3696 Change-Id: I590faac1e4340d8fa2e5a7e591249128ec2b8760 Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/2241973 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Vedashree Vidwans
committed by
Alex Waterman
Alex Waterman
parent
83d4e3c7a7
commit
917fb2e2df
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@@ -42,6 +42,9 @@ struct gk20a;
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*
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* Test Type: Feature
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*
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* Targets: nvgpu_channel_setup_sw, nvgpu_channel_init_support,
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* nvgpu_channel_destroy, nvgpu_channel_cleanup_sw
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*
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* Input: None
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*
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* Steps:
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@@ -54,7 +57,7 @@ struct gk20a;
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* Output: Returns PASS if all branches gave expected results. FAIL otherwise.
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*/
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int test_channel_setup_sw(struct unit_module *m,
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struct gk20a *g, void *args);
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struct gk20a *g, void *vargs);
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/**
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* Test specification for: test_channel_open
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@@ -63,6 +66,8 @@ int test_channel_setup_sw(struct unit_module *m,
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*
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* Test Type: Feature
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*
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* Targets: nvgpu_channel_open_new
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*
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* Input: test_fifo_init_support() run for this GPU
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*
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* Steps:
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@@ -92,7 +97,7 @@ int test_channel_setup_sw(struct unit_module *m,
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* Output: Returns PASS if all branches gave expected results. FAIL otherwise.
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*/
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int test_channel_open(struct unit_module *m,
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struct gk20a *g, void *args);
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struct gk20a *g, void *vargs);
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/**
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* Test specification for: test_channel_close
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@@ -101,6 +106,13 @@ int test_channel_open(struct unit_module *m,
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*
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* Test Type: Feature
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*
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* Targets: nvgpu_channel_close, nvgpu_channel_kill, channel_free,
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* channel_free_invoke_unbind, channel_free_wait_for_refs,
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* channel_free_invoke_deferred_engine_reset,
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* channel_free_invoke_sync_destroy,
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* channel_free_put_deterministic_ref_from_init,
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* channel_free_unlink_debug_session
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*
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* Input: test_fifo_init_support() run for this GPU
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*
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* Steps:
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@@ -122,8 +134,7 @@ int test_channel_open(struct unit_module *m,
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*
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* Output: Returns PASS if all branches gave expected results. FAIL otherwise.
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*/
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int test_channel_close(struct unit_module *m,
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struct gk20a *g, void *args);
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int test_channel_close(struct unit_module *m, struct gk20a *g, void *vargs);
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/**
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* Test specification for: test_channel_setup_bind
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@@ -132,6 +143,8 @@ int test_channel_close(struct unit_module *m,
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*
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* Test Type: Feature
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*
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* Targets: nvgpu_channel_setup_bind, nvgpu_channel_setup_usermode
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*
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* Input: test_fifo_init_support() run for this GPU
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*
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* Steps:
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@@ -160,7 +173,7 @@ int test_channel_close(struct unit_module *m,
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* Output: Returns PASS if all branches gave expected results. FAIL otherwise.
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*/
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int test_channel_setup_bind(struct unit_module *m,
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struct gk20a *g, void *args);
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struct gk20a *g, void *vargs);
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/**
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* Test specification for: test_channel_alloc_inst
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@@ -169,6 +182,8 @@ int test_channel_setup_bind(struct unit_module *m,
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*
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* Test Type: Feature
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*
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* Targets: nvgpu_channel_alloc_inst, nvgpu_channel_free_inst
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*
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* Input: test_fifo_init_support() run for this GPU
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*
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* Steps:
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@@ -186,7 +201,7 @@ int test_channel_setup_bind(struct unit_module *m,
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* Output: Returns PASS if all branches gave expected results. FAIL otherwise.
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*/
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int test_channel_alloc_inst(struct unit_module *m,
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struct gk20a *g, void *args);
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struct gk20a *g, void *vargs);
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/**
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* Test specification for: test_channel_from_inst
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@@ -195,6 +210,8 @@ int test_channel_alloc_inst(struct unit_module *m,
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*
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* Test Type: Feature
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*
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* Targets: nvgpu_channel_refch_from_inst_ptr
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*
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* Input: test_fifo_init_support() run for this GPU
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*
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* Steps:
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@@ -209,7 +226,7 @@ int test_channel_alloc_inst(struct unit_module *m,
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* Output: Returns PASS if all branches gave expected results. FAIL otherwise.
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*/
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int test_channel_from_inst(struct unit_module *m,
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struct gk20a *g, void *args);
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struct gk20a *g, void *vargs);
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/**
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* Test specification for: test_channel_enable_disable_tsg
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@@ -218,6 +235,8 @@ int test_channel_from_inst(struct unit_module *m,
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*
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* Test Type: Feature
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*
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* Targets: nvgpu_channel_enable_tsg, nvgpu_channel_disable_tsg
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*
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* Input: test_fifo_init_support() run for this GPU
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*
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* Steps:
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@@ -232,7 +251,222 @@ int test_channel_from_inst(struct unit_module *m,
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* Output: Returns PASS if all branches gave expected results. FAIL otherwise.
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*/
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int test_channel_enable_disable_tsg(struct unit_module *m,
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struct gk20a *g, void *args);
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struct gk20a *g, void *vargs);
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/**
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* Test specification for: test_channel_abort
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*
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* Description: Test channel TSG abort
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*
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* Test Type: Feature based
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*
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* Targets: nvgpu_channel_abort
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*
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* Input: test_fifo_init_support() run for this GPU
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*
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* Steps:
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* - Test that TSG abort is invoked for TSG bound channel.
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*
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* Output: Returns PASS if all branches gave expected results. FAIL otherwise.
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*/
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int test_channel_abort(struct unit_module *m, struct gk20a *g, void *vargs);
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/**
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* Test specification for: test_channel_mark_error
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*
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* Description: Mark channel as unserviceable
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*
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* Test Type: Feature based
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*
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* Targets: nvgpu_channel_mark_error, nvgpu_channel_set_unserviceable,
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* nvgpu_channel_ctxsw_timeout_debug_dump_state,
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* nvgpu_channel_set_has_timedout_and_wakeup_wqs
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*
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* Input: test_fifo_init_support() run for this GPU
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*
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* Steps:
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* - Test that the channel can be marked with error (unserviceable).
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* - Test broadcast condition fail cases.
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*
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* Output: Returns PASS if all branches gave expected results. FAIL otherwise.
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*/
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int test_channel_mark_error(struct unit_module *m,
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struct gk20a *g, void *vargs);
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/**
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* Test specification for: test_channel_sw_quiesce
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*
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* Description: Test emergency quiescing of channels
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*
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* Test Type: Feature based
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*
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* Targets: nvgpu_channel_sw_quiesce, nvgpu_channel_set_error_notifier
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*
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* Input: test_fifo_init_support() run for this GPU
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*
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* Steps:
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* - Check if channel can be placed in quiesce state.
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*
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* Output: Returns PASS if all branches gave expected results. FAIL otherwise.
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*/
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int test_channel_sw_quiesce(struct unit_module *m,
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struct gk20a *g, void *vargs);
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/**
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* Test specification for: test_channel_deterministic_idle_unidle
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*
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* Description: Stop and allow deterministic channel activity
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*
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* Test Type: Feature based
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*
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* Targets: nvgpu_channel_deterministic_idle, nvgpu_channel_deterministic_unidle
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*
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* Input: test_fifo_init_support() run for this GPU
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*
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* Steps:
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* - Execute deterministic idle and unidle functions and check if gpu usage
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* usage count is updated corresponding to input conditions.
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*
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* Output: Returns PASS if all branches gave expected results. FAIL otherwise.
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*/
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int test_channel_deterministic_idle_unidle(struct unit_module *m,
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struct gk20a *g, void *vargs);
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/**
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* Test specification for: test_channel_suspend_resume_serviceable_chs
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*
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* Description: Test suspend resume of all servicable channels
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*
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* Test Type: Feature based
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*
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* Targets: nvgpu_channel_suspend_all_serviceable_ch,
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* nvgpu_channel_resume_all_serviceable_ch,
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* nvgpu_channel_check_unserviceable
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*
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* Input: test_fifo_init_support() run for this GPU
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*
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* Steps:
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* - Check if channels can be suspended and resumed.
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*
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* Output: Returns PASS if all branches gave expected results. FAIL otherwise.
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*/
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int test_channel_suspend_resume_serviceable_chs(struct unit_module *m,
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struct gk20a *g, void *vargs);
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/**
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* Test specification for: test_channel_debug_dump
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*
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* Description: Dump channel debug information
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*
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* Test Type: Feature based
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*
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* Targets: nvgpu_channel_debug_dump_all
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*
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* Input: test_fifo_init_support() run for this GPU
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*
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* Steps:
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* - Dump all debug information for channels.
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*
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* Output: Returns PASS if all branches gave expected results. FAIL otherwise.
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*/
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int test_channel_debug_dump(struct unit_module *m,
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struct gk20a *g, void *vargs);
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/**
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* Test specification for: test_channel_semaphore_wakeup
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*
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* Description: Wake up threads waiting for semaphore
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*
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* Test Type: Feature based
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*
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* Targets: nvgpu_channel_semaphore_wakeup
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*
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* Input: test_fifo_init_support() run for this GPU
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*
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* Steps:
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* - Execute semaphore_wakeup for deterministic/non-deterministic channels.
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*
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* Output: Returns PASS if all branches gave expected results. FAIL otherwise.
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*/
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int test_channel_semaphore_wakeup(struct unit_module *m,
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struct gk20a *g, void *vargs);
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/**
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* Test specification for: test_channel_from_invalid_id
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*
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* Description: Test channel reference extracted using channel id
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*
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* Test Type: Feature based
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*
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* Targets: nvgpu_channel_from_id
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*
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* Input: test_fifo_init_support() run for this GPU
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*
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* Steps:
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* - Test corner case to retrieve channel with invalid channel id.
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*
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* Output: Returns PASS if all branches gave expected results. FAIL otherwise.
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*/
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int test_channel_from_invalid_id(struct unit_module *m, struct gk20a *g,
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void *vargs);
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/**
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* Test specification for: test_channel_put_warn
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*
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* Description: Test channel dereference
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*
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* Test Type: Feature based
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*
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* Targets: nvgpu_channel_put__func
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*
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* Input: test_fifo_init_support() run for this GPU
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*
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* Steps:
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* - Test corner cases using referenceable channel and condition broadcast fail
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* cases.
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*
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* Output: Returns PASS if all branches gave expected results. FAIL otherwise.
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*/
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int test_channel_put_warn(struct unit_module *m, struct gk20a *g, void *vargs);
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/**
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* Test specification for: test_ch_referenceable_cleanup
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*
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* Description: Test channel cleanup corner case
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*
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* Test Type: Feature based
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*
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* Targets: nvgpu_channel_cleanup_sw
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*
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* Input: test_fifo_init_support() run for this GPU
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*
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* Steps:
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* - Open a channel. Test how referenceable channel is cleaned-up/freed.
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*
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* Output: Returns PASS if all branches gave expected results. FAIL otherwise.
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*/
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int test_ch_referenceable_cleanup(struct unit_module *m,
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struct gk20a *g, void *vargs);
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/**
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* Test specification for: test_channel_abort_cleanup
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*
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* Description: Test channel abort cleanup with user_sync available
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*
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* Test Type: Feature based
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*
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* Targets: nvgpu_channel_abort_clean_up
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*
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* Input: test_fifo_init_support() run for this GPU
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*
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* Steps:
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* - Bind channel to TSG and allocate channel user_sync. Test channel abort
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* cleanup while unbinding from TSG.
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*
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* Output: Returns PASS if all branches gave expected results. FAIL otherwise.
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*/
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int test_channel_abort_cleanup(struct unit_module *m, struct gk20a *g,
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void *vargs);
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/**
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* @}
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*/
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