diff --git a/drivers/gpu/nvgpu/hal/fifo/pbdma_gv11b.h b/drivers/gpu/nvgpu/hal/fifo/pbdma_gv11b.h
index 93b2b1086..e47f586f9 100644
--- a/drivers/gpu/nvgpu/hal/fifo/pbdma_gv11b.h
+++ b/drivers/gpu/nvgpu/hal/fifo/pbdma_gv11b.h
@@ -36,7 +36,7 @@ bool gv11b_pbdma_handle_intr_1(struct gk20a *g, u32 pbdma_id, u32 pbdma_intr_1,
 u32 gv11b_pbdma_channel_fatal_0_intr_descs(void);
 u32 gv11b_pbdma_get_fc_pb_header(void);
 u32 gv11b_pbdma_get_fc_target(void);
-u32 gv11b_pbdma_set_channel_info_veid(u32 channel_id);
+u32 gv11b_pbdma_set_channel_info_veid(u32 subctx_id);
 u32 gv11b_pbdma_config_userd_writeback_enable(void);
 
 #endif /* NVGPU_PBDMA_GV11B_H */
diff --git a/drivers/gpu/nvgpu/hal/fifo/pbdma_gv11b_fusa.c b/drivers/gpu/nvgpu/hal/fifo/pbdma_gv11b_fusa.c
index 018ff0212..bde5a0392 100644
--- a/drivers/gpu/nvgpu/hal/fifo/pbdma_gv11b_fusa.c
+++ b/drivers/gpu/nvgpu/hal/fifo/pbdma_gv11b_fusa.c
@@ -270,9 +270,9 @@ u32 gv11b_pbdma_get_fc_target(void)
 			pbdma_target_ce_ctx_valid_true_f());
 }
 
-u32 gv11b_pbdma_set_channel_info_veid(u32 channel_id)
+u32 gv11b_pbdma_set_channel_info_veid(u32 subctx_id)
 {
-	return pbdma_set_channel_info_veid_f(channel_id);
+	return pbdma_set_channel_info_veid_f(subctx_id);
 }
 
 u32 gv11b_pbdma_config_userd_writeback_enable(void)
diff --git a/drivers/gpu/nvgpu/include/nvgpu/gops_pbdma.h b/drivers/gpu/nvgpu/include/nvgpu/gops_pbdma.h
index c9d37ca4d..6c40f957d 100644
--- a/drivers/gpu/nvgpu/include/nvgpu/gops_pbdma.h
+++ b/drivers/gpu/nvgpu/include/nvgpu/gops_pbdma.h
@@ -77,7 +77,7 @@ struct gops_pbdma {
 	u32 (*get_userd_hi_addr)(u32 addr_hi);
 	u32 (*get_fc_runlist_timeslice)(void);
 	u32 (*get_config_auth_level_privileged)(void);
-	u32 (*set_channel_info_veid)(u32 channel_id);
+	u32 (*set_channel_info_veid)(u32 subctx_id);
 	u32 (*config_userd_writeback_enable)(void);
 	u32 (*allowed_syncpoints_0_index_f)(u32 syncpt);
 	u32 (*allowed_syncpoints_0_valid_f)(void);