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gpu: nvgpu: remove IO_COHERENT flag

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This patch removes the IO_COHERENT flag as IO
coherence is the default setting.

Bug 3959027

Change-Id: I9800c2b8b161f7bdc2d6856639dd03488881882d
Signed-off-by: Martin Radev <mradev@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2887630
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Martin Radev
2023-04-12 22:01:07 +03:00
committed by mobile promotions
parent 81d95456b9
commit 924dd58da0
6 changed files with 2 additions and 22 deletions
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3
drivers/gpu/nvgpu/common/vgpu/mm/mm_vgpu.c
View File

@@ -352,9 +352,6 @@ u64 vgpu_locked_gmmu_map(struct vm_gk20a *vm,
if (flags & NVGPU_VM_MAP_CACHEABLE) {
p->flags = TEGRA_VGPU_MAP_CACHEABLE;
}
if (flags & NVGPU_VM_MAP_IO_COHERENT) {
p->flags |= TEGRA_VGPU_MAP_IO_COHERENT;
}
if (flags & NVGPU_VM_MAP_L3_ALLOC) {
p->flags |= TEGRA_VGPU_MAP_L3_ALLOC;
}

1
drivers/gpu/nvgpu/include/nvgpu/vgpu/tegra_vgpu.h
View File

@@ -179,7 +179,6 @@ struct tegra_vgpu_as_map_params {
};
#define TEGRA_VGPU_MAP_CACHEABLE (1 << 0)
#define TEGRA_VGPU_MAP_IO_COHERENT (1 << 1)
#define TEGRA_VGPU_MAP_L3_ALLOC (1 << 2)
#define TEGRA_VGPU_MAP_SYSTEM_COHERENT (1 << 3)

1
drivers/gpu/nvgpu/include/nvgpu/vm.h
View File

@@ -347,7 +347,6 @@ struct vm_gk20a {
*/
#define NVGPU_VM_MAP_FIXED_OFFSET BIT32(0)
#define NVGPU_VM_MAP_CACHEABLE BIT32(1)
#define NVGPU_VM_MAP_IO_COHERENT BIT32(2)
#define NVGPU_VM_MAP_UNMAPPED_PTE BIT32(3)
#define NVGPU_VM_MAP_L3_ALLOC BIT32(5)
#define NVGPU_VM_MAP_SYSTEM_COHERENT BIT32(6)

4
drivers/gpu/nvgpu/os/linux/vm.c
View File

@@ -58,10 +58,6 @@ static int nvgpu_vm_translate_linux_flags(struct gk20a *g, u32 flags, u32 *out_c
core_flags |= NVGPU_VM_MAP_CACHEABLE;
consumed_flags |= NVGPU_AS_MAP_BUFFER_FLAGS_CACHEABLE;
}
if ((flags & NVGPU_AS_MAP_BUFFER_FLAGS_IO_COHERENT) != 0U) {
core_flags |= NVGPU_VM_MAP_IO_COHERENT;
consumed_flags |= NVGPU_AS_MAP_BUFFER_FLAGS_IO_COHERENT;
}
if ((flags & NVGPU_AS_MAP_BUFFER_FLAGS_UNMAPPED_PTE) != 0U) {
core_flags |= NVGPU_VM_MAP_UNMAPPED_PTE;
consumed_flags |= NVGPU_AS_MAP_BUFFER_FLAGS_UNMAPPED_PTE;

7
include/uapi/linux/nvgpu-as.h
View File

@@ -104,7 +104,6 @@ struct nvgpu_as_bind_channel_args {
*/
#define NVGPU_AS_MAP_BUFFER_FLAGS_FIXED_OFFSET (1 << 0)
#define NVGPU_AS_MAP_BUFFER_FLAGS_CACHEABLE (1 << 2)
#define NVGPU_AS_MAP_BUFFER_FLAGS_IO_COHERENT (1 << 4)
#define NVGPU_AS_MAP_BUFFER_FLAGS_UNMAPPED_PTE (1 << 5)
#define NVGPU_AS_MAP_BUFFER_FLAGS_MAPPABLE_COMPBITS (1 << 6)
#define NVGPU_AS_MAP_BUFFER_FLAGS_L3_ALLOC (1 << 7)
@@ -140,12 +139,6 @@ struct nvgpu_as_bind_channel_args {
*
* Specify that a mapping shall be GPU cachable.
*
* %NVGPU_AS_MAP_BUFFER_FLAGS_IO_COHERENT
*
* Specify that a mapping shall be IO coherent.
*
* DEPRECATED: do not use! This will be removed in a future update.
*
* %NVGPU_AS_MAP_BUFFER_FLAGS_UNMAPPED_PTE
*
* Specify that a mapping shall be marked as invalid but otherwise

8
userspace/units/mm/gmmu/page_table/page_table.c
View File

@@ -1,5 +1,5 @@
/*
* Copyright (c) 2018-2021, NVIDIA CORPORATION. All rights reserved.
* Copyright (c) 2018-2023, NVIDIA CORPORATION. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
@@ -124,7 +124,7 @@ static struct test_parameters test_iommu_sysmem_coh = {
.aperture = APERTURE_SYSMEM,
.is_iommuable = true,
.rw_flag = gk20a_mem_flag_none,
.flags = NVGPU_VM_MAP_CACHEABLE | NVGPU_VM_MAP_IO_COHERENT,
.flags = NVGPU_VM_MAP_CACHEABLE,
.priv = false,
};
@@ -760,10 +760,6 @@ static u64 gmmu_map_advanced(struct unit_module *m, struct gk20a *g,
mem->cpu_va = NULL;
}
if (nvgpu_is_enabled(g, NVGPU_USE_COHERENT_SYSMEM)) {
params->flags |= NVGPU_VM_MAP_IO_COHERENT;
}
nvgpu_mutex_acquire(&vm->update_gmmu_lock);
vaddr = g->ops.mm.gmmu.map(vm, (u64) mem->cpu_va,