nv-tegra-mirror/linux-nvgpu
1
0
Fork 0
mirror of git://nv-tegra.nvidia.com/linux-nvgpu.git synced 2025-12-24 10:34:43 +03:00
Code Issues Packages Projects Releases Wiki Activity

gpu: nvgpu: add ioctls for TSG enable/disable

Browse Source 
Add ioctls to enable/disable/preempt a TSG

1. NVGPU_IOCTL_TSG_ENABLE
   enable all the channels in a TSG

2. NVGPU_IOCTL_TSG_DISABLE
   disable all the channels in a TSG

3. NVGPU_IOCTL_TSG_PREEMPT
   preempt a TSG with given id

Bug 1514064

Change-Id: I2db6404b8536e872243cbe57b99e7c6d14243fa5
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/494671
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
This commit is contained in:
Deepak Nibade
2014-09-02 15:27:43 +05:30
committed by Dan Willemsen
parent 48e19c6c28
commit 926cd4a260
1 changed files with 55 additions and 0 deletions
Download Patch File Download Diff File Expand all files Collapse all files

55
drivers/gpu/nvgpu/gk20a/tsg_gk20a.c
View File

@@ -23,6 +23,7 @@
#include <linux/anon_inodes.h>
#include "gk20a.h"
#include "hw_ccsr_gk20a.h"
static void gk20a_tsg_release(struct kref *ref);
@@ -226,6 +227,60 @@ long gk20a_tsg_dev_ioctl(struct file *filp, unsigned int cmd,
*/
break;
case NVGPU_IOCTL_TSG_ENABLE:
{
struct channel_gk20a *ch;
err = gk20a_busy(g->dev);
if (err) {
gk20a_err(&g->dev->dev,
"failed to host gk20a for ioctl cmd: 0x%x", cmd);
return err;
}
mutex_lock(&tsg->ch_list_lock);
list_for_each_entry(ch, &tsg->ch_list, ch_entry) {
gk20a_writel(ch->g, ccsr_channel_r(ch->hw_chid),
gk20a_readl(ch->g, ccsr_channel_r(ch->hw_chid))
| ccsr_channel_enable_set_true_f());
}
mutex_unlock(&tsg->ch_list_lock);
gk20a_idle(g->dev);
break;
}
case NVGPU_IOCTL_TSG_DISABLE:
{
struct channel_gk20a *ch;
err = gk20a_busy(g->dev);
if (err) {
gk20a_err(&g->dev->dev,
"failed to host gk20a for ioctl cmd: 0x%x", cmd);
return err;
}
mutex_lock(&tsg->ch_list_lock);
list_for_each_entry(ch, &tsg->ch_list, ch_entry) {
gk20a_writel(ch->g, ccsr_channel_r(ch->hw_chid),
gk20a_readl(ch->g, ccsr_channel_r(ch->hw_chid))
| ccsr_channel_enable_clr_true_f());
}
mutex_unlock(&tsg->ch_list_lock);
gk20a_idle(g->dev);
break;
}
case NVGPU_IOCTL_TSG_PREEMPT:
{
err = gk20a_busy(g->dev);
if (err) {
gk20a_err(&g->dev->dev,
"failed to host gk20a for ioctl cmd: 0x%x", cmd);
return err;
}
/* preempt TSG */
err = gk20a_fifo_preempt_tsg(g, tsg->tsgid);
gk20a_idle(g->dev);
break;
}
default:
gk20a_err(dev_from_gk20a(g),
"unrecognized tsg gpu ioctl cmd: 0x%x",