gpu: nvgpu: ltc: create sub-unit for ltc intr

Created sub-unit for ltc interrupt handling.
Following 2-hals are moved from ltc to ltc intr unit:
void (*isr)(struct gk20a *g, u32 ltc);
void (*en_illegal_compstat)(struct gk20a *g, bool enable)

Added new hal in ltc intr sub-unit for configuring ltc interrupts:
void (*configure)(struct gk20a *g);

Moved ltc interrupt related code from ltc to ltc intr unit.
Chip ltc.intr hals are populated with updated function names
created in ltc intr unit.

Converted all "unsigned int" usage to "u32" in ltc and ltc intr units
to match with hardware 32 bit register read/write.

JIRA NVGPU-3042
JIRA NVGPU-2044

Change-Id: I8684dfcc8ae343e4588b93f2b0ccde0e227635df
Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2081140
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Seshendra Gadagottu
2019-03-25 11:58:19 -07:00
committed by mobile promotions
parent ee433c55bf
commit 9346b104d4
26 changed files with 588 additions and 323 deletions

View File

@@ -1,5 +1,5 @@
/*
* Copyright (C) 2018 NVIDIA Corporation. All rights reserved.
* Copyright (C) 2018-2019 NVIDIA Corporation. All rights reserved.
*
* This software is licensed under the terms of the GNU General Public
* License version 2, as published by the Free Software Foundation, and
@@ -45,7 +45,7 @@ static ssize_t ltc_intr_illegal_compstat_write(struct file *file,
struct gk20a *g = file->private_data;
int err;
if (!g->ops.ltc.intr_en_illegal_compstat)
if (!g->ops.ltc.intr.en_illegal_compstat)
return -EINVAL;
buf_size = min(count, (sizeof(buf)-1));
@@ -57,7 +57,7 @@ static ssize_t ltc_intr_illegal_compstat_write(struct file *file,
return err;
if (strtobool(buf, &intr_illegal_compstat_enabled) == 0) {
g->ops.ltc.intr_en_illegal_compstat(g,
g->ops.ltc.intr.en_illegal_compstat(g,
intr_illegal_compstat_enabled);
g->ltc_intr_en_illegal_compstat = intr_illegal_compstat_enabled;
}