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gpu: nvgpu: rename timeout of channel struct to wdt

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Rename channel_gk20a_timeout to nvgpu_channel_wdt.
Rename timeout variable of channel_gk20a struct to wdt.
Rename ch_wdt_timeout_ms to ch_wdt_init_limit_ms.

Rename gk20a_channel_timeout_* to nvgpu_channel_wdt_*

JIRA NVGPU-1312

Change-Id: Ida78426cc007b53f3d407cf85428d15f7fe7518a
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2077641
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Seema Khowala
2019-03-20 11:35:22 -07:00
committed by mobile promotions
parent 737de7eac5
commit 9393e2a90a
20 changed files with 88 additions and 88 deletions
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12
drivers/gpu/nvgpu/os/linux/pci.c
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@@ -98,7 +98,7 @@ static struct gk20a_platform nvgpu_pci_device[] = {
.is_railgated = nvgpu_pci_tegra_is_railgated,
.clk_round_rate = nvgpu_pci_clk_round_rate,
.ch_wdt_timeout_ms = 7000,
.ch_wdt_init_limit_ms = 7000,
.unify_address_spaces = true,
.honors_aperture = true,
@@ -133,7 +133,7 @@ static struct gk20a_platform nvgpu_pci_device[] = {
.is_railgated = nvgpu_pci_tegra_is_railgated,
.clk_round_rate = nvgpu_pci_clk_round_rate,
.ch_wdt_timeout_ms = 7000,
.ch_wdt_init_limit_ms = 7000,
.unify_address_spaces = true,
.honors_aperture = true,
@@ -168,7 +168,7 @@ static struct gk20a_platform nvgpu_pci_device[] = {
.is_railgated = nvgpu_pci_tegra_is_railgated,
.clk_round_rate = nvgpu_pci_clk_round_rate,
.ch_wdt_timeout_ms = 7000,
.ch_wdt_init_limit_ms = 7000,
.unify_address_spaces = true,
.honors_aperture = true,
@@ -205,7 +205,7 @@ static struct gk20a_platform nvgpu_pci_device[] = {
.is_railgated = nvgpu_pci_tegra_is_railgated,
.clk_round_rate = nvgpu_pci_clk_round_rate,
.ch_wdt_timeout_ms = 7000,
.ch_wdt_init_limit_ms = 7000,
.unify_address_spaces = true,
.honors_aperture = true,
@@ -244,7 +244,7 @@ static struct gk20a_platform nvgpu_pci_device[] = {
/*
* WAR: PCIE X1 is very slow, set to very high value till nvlink is up
*/
.ch_wdt_timeout_ms = 30000,
.ch_wdt_init_limit_ms = 30000,
.unify_address_spaces = true,
.honors_aperture = true,
@@ -280,7 +280,7 @@ static struct gk20a_platform nvgpu_pci_device[] = {
.is_railgated = nvgpu_pci_tegra_is_railgated,
.clk_round_rate = nvgpu_pci_clk_round_rate,
.ch_wdt_timeout_ms = 7000,
.ch_wdt_init_limit_ms = 7000,
.unify_address_spaces = true,
.honors_aperture = true,