diff --git a/arch/nvgpu-hal-new.yaml b/arch/nvgpu-hal-new.yaml index f9d23aa02..694cb4185 100644 --- a/arch/nvgpu-hal-new.yaml +++ b/arch/nvgpu-hal-new.yaml @@ -9,7 +9,8 @@ bus_fusa: sources: [ hal/bus/bus_gk20a_fusa.c, hal/bus/bus_gk20a.h, hal/bus/bus_gm20b_fusa.c, hal/bus/bus_gm20b.h, - hal/bus/bus_gp10b_fusa.c, hal/bus/bus_gp10b.h ] + hal/bus/bus_gp10b_fusa.c, hal/bus/bus_gp10b.h, + hal/bus/bus_gv11b_fusa.c, hal/bus/bus_gv11b.h ] bus: safe: no diff --git a/drivers/gpu/nvgpu/Makefile b/drivers/gpu/nvgpu/Makefile index 3489d2a15..5890b6d1d 100644 --- a/drivers/gpu/nvgpu/Makefile +++ b/drivers/gpu/nvgpu/Makefile @@ -581,6 +581,7 @@ nvgpu-y += \ hal/bus/bus_gk20a_fusa.o \ hal/bus/bus_gm20b_fusa.o \ hal/bus/bus_gp10b_fusa.o \ + hal/bus/bus_gv11b_fusa.o \ hal/ce/ce_gp10b_fusa.o \ hal/ce/ce_gv11b_fusa.o \ hal/class/class_gm20b_fusa.o \ diff --git a/drivers/gpu/nvgpu/Makefile.sources b/drivers/gpu/nvgpu/Makefile.sources index 09d6311ae..d594c6311 100644 --- a/drivers/gpu/nvgpu/Makefile.sources +++ b/drivers/gpu/nvgpu/Makefile.sources @@ -165,6 +165,7 @@ srcs += hal/mm/mm_gv11b_fusa.c \ hal/bus/bus_gk20a_fusa.c \ hal/bus/bus_gm20b_fusa.c \ hal/bus/bus_gp10b_fusa.c \ + hal/bus/bus_gv11b_fusa.c \ hal/ce/ce_gp10b_fusa.c \ hal/ce/ce_gv11b_fusa.c \ hal/class/class_gm20b_fusa.c \ diff --git a/drivers/gpu/nvgpu/hal/bus/bus_gk20a_fusa.c b/drivers/gpu/nvgpu/hal/bus/bus_gk20a_fusa.c index 89bf250dc..9128a1a66 100644 --- a/drivers/gpu/nvgpu/hal/bus/bus_gk20a_fusa.c +++ b/drivers/gpu/nvgpu/hal/bus/bus_gk20a_fusa.c @@ -44,6 +44,10 @@ void gk20a_bus_init_hw(struct gk20a *g) } gk20a_writel(g, bus_intr_en_0_r(), intr_en_mask); + + if (g->ops.bus.configure_debug_bus != NULL) { + g->ops.bus.configure_debug_bus(g); + } } void gk20a_bus_isr(struct gk20a *g) diff --git a/drivers/gpu/nvgpu/hal/bus/bus_gv11b.h b/drivers/gpu/nvgpu/hal/bus/bus_gv11b.h new file mode 100644 index 000000000..56d824d9a --- /dev/null +++ b/drivers/gpu/nvgpu/hal/bus/bus_gv11b.h @@ -0,0 +1,29 @@ +/* + * Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ +#ifndef BUS_GV11B_H +#define BUS_GV11B_H + +struct gk20a; + +void gv11b_bus_configure_debug_bus(struct gk20a *g); + +#endif /* BUS_GV11B_H */ diff --git a/drivers/gpu/nvgpu/hal/bus/bus_gv11b_fusa.c b/drivers/gpu/nvgpu/hal/bus/bus_gv11b_fusa.c new file mode 100644 index 000000000..a8c65388e --- /dev/null +++ b/drivers/gpu/nvgpu/hal/bus/bus_gv11b_fusa.c @@ -0,0 +1,38 @@ +/* + * Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#include +#include + +#include "bus_gv11b.h" + +#include + +void gv11b_bus_configure_debug_bus(struct gk20a *g) +{ +#if !defined(CONFIG_NVGPU_DEBUGGER) + nvgpu_writel(g, bus_debug_sel_0_r(), 0U); + nvgpu_writel(g, bus_debug_sel_1_r(), 0U); + nvgpu_writel(g, bus_debug_sel_2_r(), 0U); + nvgpu_writel(g, bus_debug_sel_3_r(), 0U); +#endif +} diff --git a/drivers/gpu/nvgpu/hal/init/hal_gv11b.c b/drivers/gpu/nvgpu/hal/init/hal_gv11b.c index 4155b0fa2..cfcbef12a 100644 --- a/drivers/gpu/nvgpu/hal/init/hal_gv11b.c +++ b/drivers/gpu/nvgpu/hal/init/hal_gv11b.c @@ -55,6 +55,7 @@ #include "hal/bus/bus_gk20a.h" #include "hal/bus/bus_gp10b.h" #include "hal/bus/bus_gm20b.h" +#include "hal/bus/bus_gv11b.h" #include "hal/ce/ce_gv11b.h" #include "hal/class/class_gv11b.h" #include "hal/priv_ring/priv_ring_gm20b.h" @@ -1298,6 +1299,7 @@ static const struct gpu_ops gv11b_ops = { .isr = gk20a_bus_isr, .bar1_bind = gm20b_bus_bar1_bind, .bar2_bind = gp10b_bus_bar2_bind, + .configure_debug_bus = gv11b_bus_configure_debug_bus, #ifdef CONFIG_NVGPU_DGPU .set_bar0_window = gk20a_bus_set_bar0_window, #endif diff --git a/drivers/gpu/nvgpu/hal/init/hal_tu104.c b/drivers/gpu/nvgpu/hal/init/hal_tu104.c index 0a1f50f0e..947b0ace1 100644 --- a/drivers/gpu/nvgpu/hal/init/hal_tu104.c +++ b/drivers/gpu/nvgpu/hal/init/hal_tu104.c @@ -39,6 +39,7 @@ #include "hal/mc/mc_tu104.h" #include "hal/bus/bus_gk20a.h" #include "hal/bus/bus_gv100.h" +#include "hal/bus/bus_gv11b.h" #include "hal/bus/bus_tu104.h" #include "hal/ce/ce_gp10b.h" #include "hal/ce/ce_gv11b.h" @@ -1319,6 +1320,7 @@ static const struct gpu_ops tu104_ops = { .isr = gk20a_bus_isr, .bar1_bind = NULL, .bar2_bind = bus_tu104_bar2_bind, + .configure_debug_bus = gv11b_bus_configure_debug_bus, #ifdef CONFIG_NVGPU_DGPU .set_bar0_window = gk20a_bus_set_bar0_window, #endif diff --git a/drivers/gpu/nvgpu/include/nvgpu/gk20a.h b/drivers/gpu/nvgpu/include/nvgpu/gk20a.h index f24b2649e..8ebc441a4 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/gk20a.h +++ b/drivers/gpu/nvgpu/include/nvgpu/gk20a.h @@ -1696,6 +1696,7 @@ struct gpu_ops { #endif u32 (*read_sw_scratch)(struct gk20a *g, u32 index); void (*write_sw_scratch)(struct gk20a *g, u32 index, u32 val); + void (*configure_debug_bus)(struct gk20a *g); } bus; struct { diff --git a/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_bus_gv11b.h b/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_bus_gv11b.h index dc5d8ec7d..64125791b 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_bus_gv11b.h +++ b/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_bus_gv11b.h @@ -104,4 +104,8 @@ #define bus_intr_en_0_pri_squash_m() (U32(0x1U) << 1U) #define bus_intr_en_0_pri_fecserr_m() (U32(0x1U) << 2U) #define bus_intr_en_0_pri_timeout_m() (U32(0x1U) << 3U) +#define bus_debug_sel_0_r() (0x000010a0U) +#define bus_debug_sel_1_r() (0x000010a4U) +#define bus_debug_sel_2_r() (0x000010a8U) +#define bus_debug_sel_3_r() (0x000010acU) #endif diff --git a/drivers/gpu/nvgpu/include/nvgpu/hw/tu104/hw_bus_tu104.h b/drivers/gpu/nvgpu/include/nvgpu/hw/tu104/hw_bus_tu104.h index 0f373420b..1a1663b30 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/hw/tu104/hw_bus_tu104.h +++ b/drivers/gpu/nvgpu/include/nvgpu/hw/tu104/hw_bus_tu104.h @@ -106,4 +106,8 @@ #define bus_intr_en_0_pri_squash_m() (U32(0x1U) << 1U) #define bus_intr_en_0_pri_fecserr_m() (U32(0x1U) << 2U) #define bus_intr_en_0_pri_timeout_m() (U32(0x1U) << 3U) +#define bus_debug_sel_0_r() (0x000010a0U) +#define bus_debug_sel_1_r() (0x000010a4U) +#define bus_debug_sel_2_r() (0x000010a8U) +#define bus_debug_sel_3_r() (0x000010acU) #endif