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gpu: nvgpu: gp10b: Gating reglist
Change-Id: I4931958c21692306d6c78bffdc45e21c553b913c Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com> Reviewed-on: http://git-master/r/731494
This commit is contained in:
Terje Bergstrom
committed by
Deepak Nibade
Deepak Nibade
parent
4b02177fd3
commit
93e001d24f
@@ -20,6 +20,7 @@ obj-$(CONFIG_GK20A) += \
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fb_gp10b.o \
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fb_gp10b.o \
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pmu_gp10b.o \
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pmu_gp10b.o \
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hal_gp10b.o \
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hal_gp10b.o \
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rpfb_gp10b.o
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rpfb_gp10b.o \
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gp10b_gating_reglist.o
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obj-$(CONFIG_TEGRA_GK20A) += platform_gp10b_tegra.o
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obj-$(CONFIG_TEGRA_GK20A) += platform_gp10b_tegra.o
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621
drivers/gpu/nvgpu/gp10b/gp10b_gating_reglist.c
Normal file
621
drivers/gpu/nvgpu/gp10b/gp10b_gating_reglist.c
Normal file
@@ -0,0 +1,621 @@
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/*
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* Copyright (c) 2014-2015, NVIDIA CORPORATION. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
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*
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* This file is autogenerated. Do not edit.
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*/
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#ifndef __gp10b_gating_reglist_h__
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#define __gp10b_gating_reglist_h__
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#include <linux/types.h>
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#include "gp10b_gating_reglist.h"
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struct gating_desc {
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u32 addr;
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u32 prod;
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u32 disable;
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};
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/* slcg bus */
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static const struct gating_desc gp10b_slcg_bus[] = {
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{.addr = 0x00001c04, .prod = 0x00000000, .disable = 0x000003fe},
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};
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/* slcg ce2 */
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static const struct gating_desc gp10b_slcg_ce2[] = {
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{.addr = 0x00106f28, .prod = 0x00000000, .disable = 0x000007fe},
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};
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/* slcg chiplet */
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static const struct gating_desc gp10b_slcg_chiplet[] = {
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{.addr = 0x0010c07c, .prod = 0x00000000, .disable = 0x00000007},
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{.addr = 0x0010e07c, .prod = 0x00000000, .disable = 0x00000007},
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{.addr = 0x0010d07c, .prod = 0x00000000, .disable = 0x00000007},
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{.addr = 0x0010e17c, .prod = 0x00000000, .disable = 0x00000007},
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};
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/* slcg fb */
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static const struct gating_desc gp10b_slcg_fb[] = {
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{.addr = 0x00100d14, .prod = 0x00000000, .disable = 0xfffffffe},
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{.addr = 0x00100c9c, .prod = 0x00000000, .disable = 0x000001fe},
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};
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/* slcg fifo */
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static const struct gating_desc gp10b_slcg_fifo[] = {
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{.addr = 0x000026ac, .prod = 0x00000100, .disable = 0x0001fffe},
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};
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/* slcg gr */
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static const struct gating_desc gp10b_slcg_gr[] = {
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{.addr = 0x004041f4, .prod = 0x00000000, .disable = 0x03fffffe},
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{.addr = 0x0040917c, .prod = 0x00020008, .disable = 0x0003fffe},
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{.addr = 0x00409894, .prod = 0x00000040, .disable = 0x03fffffe},
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{.addr = 0x004078c4, .prod = 0x00000000, .disable = 0x000001fe},
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{.addr = 0x00406004, .prod = 0x00000000, .disable = 0x0001fffe},
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{.addr = 0x00405864, .prod = 0x00000000, .disable = 0x000001fe},
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{.addr = 0x00405910, .prod = 0xfffffff0, .disable = 0xfffffffe},
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{.addr = 0x00408044, .prod = 0x00000000, .disable = 0x000007fe},
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{.addr = 0x00407004, .prod = 0x00000000, .disable = 0x000001fe},
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{.addr = 0x0041a17c, .prod = 0x00020008, .disable = 0x0003fffe},
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{.addr = 0x0041a894, .prod = 0x00000040, .disable = 0x03fffffe},
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{.addr = 0x00418504, .prod = 0x00000000, .disable = 0x0007fffe},
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{.addr = 0x0041860c, .prod = 0x00000000, .disable = 0x000001fe},
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{.addr = 0x0041868c, .prod = 0x00000000, .disable = 0x0000001e},
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{.addr = 0x0041871c, .prod = 0x00000000, .disable = 0x0000003e},
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{.addr = 0x00418388, .prod = 0x00000000, .disable = 0x00000001},
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{.addr = 0x0041882c, .prod = 0x00000000, .disable = 0x0001fffe},
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{.addr = 0x00418bc0, .prod = 0x00000000, .disable = 0x000001fe},
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{.addr = 0x00418974, .prod = 0x00000000, .disable = 0x0001fffe},
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{.addr = 0x00418c74, .prod = 0xffffffc0, .disable = 0xfffffffe},
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{.addr = 0x00418cf4, .prod = 0xfffffffc, .disable = 0xfffffffe},
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{.addr = 0x00418d74, .prod = 0xffffffe0, .disable = 0xfffffffe},
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{.addr = 0x00418f10, .prod = 0xffffffe0, .disable = 0xfffffffe},
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{.addr = 0x00418e10, .prod = 0xfffffffe, .disable = 0xfffffffe},
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{.addr = 0x00419024, .prod = 0x000001fe, .disable = 0x000001fe},
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{.addr = 0x0041889c, .prod = 0x00000000, .disable = 0x000001fe},
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{.addr = 0x00419d24, .prod = 0x00000000, .disable = 0x0000ffff},
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{.addr = 0x00419a44, .prod = 0x00000000, .disable = 0x0000000e},
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{.addr = 0x00419a4c, .prod = 0x00000000, .disable = 0x000001fe},
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{.addr = 0x00419a54, .prod = 0x00000000, .disable = 0x0000003e},
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{.addr = 0x00419a5c, .prod = 0x00000000, .disable = 0x0000000e},
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{.addr = 0x00419a64, .prod = 0x00000000, .disable = 0x000001fe},
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{.addr = 0x00419a6c, .prod = 0x00000000, .disable = 0x0000000e},
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{.addr = 0x00419a74, .prod = 0x00000000, .disable = 0x0000000e},
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{.addr = 0x00419a7c, .prod = 0x00000000, .disable = 0x0000003e},
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{.addr = 0x00419a84, .prod = 0x00000000, .disable = 0x0000000e},
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{.addr = 0x0041986c, .prod = 0x00000104, .disable = 0x00fffffe},
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{.addr = 0x00419cd8, .prod = 0x00000000, .disable = 0x001ffffe},
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{.addr = 0x00419ce0, .prod = 0x00000000, .disable = 0x001ffffe},
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{.addr = 0x00419c74, .prod = 0x0000001e, .disable = 0x0000001e},
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{.addr = 0x00419fd4, .prod = 0x00000000, .disable = 0x0003fffe},
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{.addr = 0x00419fdc, .prod = 0xffedff00, .disable = 0xfffffffe},
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{.addr = 0x00419fe4, .prod = 0x00001b00, .disable = 0x00001ffe},
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{.addr = 0x00419ff4, .prod = 0x00000000, .disable = 0x00003ffe},
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{.addr = 0x00419ffc, .prod = 0x00000000, .disable = 0x0001fffe},
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{.addr = 0x0041be2c, .prod = 0x04115fc0, .disable = 0xfffffffe},
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{.addr = 0x0041bfec, .prod = 0xfffffff0, .disable = 0xfffffffe},
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{.addr = 0x0041bed4, .prod = 0xfffffff8, .disable = 0xfffffffe},
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{.addr = 0x00408814, .prod = 0x00000000, .disable = 0x0001fffe},
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{.addr = 0x00408a84, .prod = 0x00000000, .disable = 0x0001fffe},
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{.addr = 0x004089ac, .prod = 0x00000000, .disable = 0x0001fffe},
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{.addr = 0x00408a24, .prod = 0x00000000, .disable = 0x0000ffff},
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};
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/* slcg ltc */
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static const struct gating_desc gp10b_slcg_ltc[] = {
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{.addr = 0x0017e050, .prod = 0x00000000, .disable = 0xfffffffe},
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{.addr = 0x0017e35c, .prod = 0x00000000, .disable = 0xfffffffe},
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};
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/* slcg perf */
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static const struct gating_desc gp10b_slcg_perf[] = {
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{.addr = 0x001be018, .prod = 0x000001ff, .disable = 0x00000000},
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{.addr = 0x001bc018, .prod = 0x000001ff, .disable = 0x00000000},
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{.addr = 0x001b8018, .prod = 0x000001ff, .disable = 0x00000000},
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{.addr = 0x001b4124, .prod = 0x00000001, .disable = 0x00000000},
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};
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/* slcg PriRing */
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static const struct gating_desc gp10b_slcg_priring[] = {
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{.addr = 0x001200a8, .prod = 0x00000000, .disable = 0x00000001},
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};
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/* slcg pwr_csb */
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static const struct gating_desc gp10b_slcg_pwr_csb[] = {
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{.addr = 0x00000134, .prod = 0x00020008, .disable = 0x0003fffe},
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{.addr = 0x00000e74, .prod = 0x00000000, .disable = 0x0000000f},
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{.addr = 0x00000a74, .prod = 0x00000000, .disable = 0x00007ffe},
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{.addr = 0x000016b8, .prod = 0x00000000, .disable = 0x0000000f},
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};
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/* slcg pmu */
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static const struct gating_desc gp10b_slcg_pmu[] = {
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{.addr = 0x0010a134, .prod = 0x00020008, .disable = 0x0003fffe},
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{.addr = 0x0010aa74, .prod = 0x00000000, .disable = 0x00007ffe},
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{.addr = 0x0010ae74, .prod = 0x00000000, .disable = 0x0000000f},
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};
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/* therm gr */
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static const struct gating_desc gp10b_slcg_therm[] = {
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{.addr = 0x000206b8, .prod = 0x00000000, .disable = 0x0000000f},
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};
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/* slcg Xbar */
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static const struct gating_desc gp10b_slcg_xbar[] = {
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{.addr = 0x0013cbe4, .prod = 0x00000000, .disable = 0x1ffffffe},
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{.addr = 0x0013cc04, .prod = 0x00000000, .disable = 0x1ffffffe},
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};
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/* blcg bus */
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static const struct gating_desc gp10b_blcg_bus[] = {
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{.addr = 0x00001c00, .prod = 0x00000042, .disable = 0x00000000},
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};
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/* blcg ctxsw prog */
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static const struct gating_desc gp10b_blcg_ctxsw_prog[] = {
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};
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/* blcg fb */
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static const struct gating_desc gp10b_blcg_fb[] = {
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{.addr = 0x00100d10, .prod = 0x0000c242, .disable = 0x00000000},
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{.addr = 0x00100d30, .prod = 0x0000c242, .disable = 0x00000000},
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{.addr = 0x00100d3c, .prod = 0x00000242, .disable = 0x00000000},
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{.addr = 0x00100d48, .prod = 0x0000c242, .disable = 0x00000000},
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{.addr = 0x00100d1c, .prod = 0x00000042, .disable = 0x00000000},
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{.addr = 0x00100c98, .prod = 0x00004242, .disable = 0x00000000},
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};
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/* blcg fifo */
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static const struct gating_desc gp10b_blcg_fifo[] = {
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{.addr = 0x000026a4, .prod = 0x0000c242, .disable = 0x00000000},
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};
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/* blcg gr */
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static const struct gating_desc gp10b_blcg_gr[] = {
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{.addr = 0x004041f0, .prod = 0x0000c646, .disable = 0x00000000},
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{.addr = 0x00409890, .prod = 0x0000007f, .disable = 0x00000000},
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{.addr = 0x004098b0, .prod = 0x0000007f, .disable = 0x00000000},
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{.addr = 0x004078c0, .prod = 0x00004242, .disable = 0x00000000},
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{.addr = 0x00406000, .prod = 0x0000c444, .disable = 0x00000000},
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{.addr = 0x00405860, .prod = 0x0000c242, .disable = 0x00000000},
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{.addr = 0x0040590c, .prod = 0x0000c444, .disable = 0x00000000},
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{.addr = 0x00408040, .prod = 0x0000c444, .disable = 0x00000000},
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{.addr = 0x00407000, .prod = 0x4000c141, .disable = 0x00000000},
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{.addr = 0x00405bf0, .prod = 0x0000c444, .disable = 0x00000000},
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{.addr = 0x0041a890, .prod = 0x0000427f, .disable = 0x00000000},
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{.addr = 0x0041a8b0, .prod = 0x0000007f, .disable = 0x00000000},
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{.addr = 0x00418500, .prod = 0x0000c244, .disable = 0x00000000},
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{.addr = 0x00418608, .prod = 0x0000c242, .disable = 0x00000000},
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{.addr = 0x00418688, .prod = 0x0000c242, .disable = 0x00000000},
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{.addr = 0x00418718, .prod = 0x00000042, .disable = 0x00000000},
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{.addr = 0x00418828, .prod = 0x00008444, .disable = 0x00000000},
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{.addr = 0x00418bbc, .prod = 0x0000c242, .disable = 0x00000000},
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{.addr = 0x00418970, .prod = 0x0000c242, .disable = 0x00000000},
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{.addr = 0x00418c70, .prod = 0x0000c444, .disable = 0x00000000},
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{.addr = 0x00418cf0, .prod = 0x0000c444, .disable = 0x00000000},
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{.addr = 0x00418d70, .prod = 0x0000c444, .disable = 0x00000000},
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{.addr = 0x00418f0c, .prod = 0x0000c444, .disable = 0x00000000},
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{.addr = 0x00418e0c, .prod = 0x0000c444, .disable = 0x00000000},
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{.addr = 0x00419020, .prod = 0x0000c242, .disable = 0x00000000},
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{.addr = 0x00419038, .prod = 0x00000042, .disable = 0x00000000},
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{.addr = 0x00418898, .prod = 0x00004242, .disable = 0x00000000},
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{.addr = 0x00419a40, .prod = 0x0000c242, .disable = 0x00000000},
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{.addr = 0x00419a48, .prod = 0x0000c242, .disable = 0x00000000},
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{.addr = 0x00419a50, .prod = 0x0000c242, .disable = 0x00000000},
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{.addr = 0x00419a58, .prod = 0x0000c242, .disable = 0x00000000},
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{.addr = 0x00419a60, .prod = 0x0000c242, .disable = 0x00000000},
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{.addr = 0x00419a68, .prod = 0x0000c242, .disable = 0x00000000},
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{.addr = 0x00419a70, .prod = 0x0000c242, .disable = 0x00000000},
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{.addr = 0x00419a78, .prod = 0x0000c242, .disable = 0x00000000},
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{.addr = 0x00419a80, .prod = 0x0000c242, .disable = 0x00000000},
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{.addr = 0x00419868, .prod = 0x00008242, .disable = 0x00000000},
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{.addr = 0x00419cd4, .prod = 0x00000002, .disable = 0x00000000},
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{.addr = 0x00419cdc, .prod = 0x00000002, .disable = 0x00000000},
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{.addr = 0x00419c70, .prod = 0x0000c444, .disable = 0x00000000},
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{.addr = 0x00419fd0, .prod = 0x0000c044, .disable = 0x00000000},
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{.addr = 0x00419fd8, .prod = 0x0000c046, .disable = 0x00000000},
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{.addr = 0x00419fe0, .prod = 0x0000c044, .disable = 0x00000000},
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{.addr = 0x00419fe8, .prod = 0x0000c042, .disable = 0x00000000},
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{.addr = 0x00419ff0, .prod = 0x0000c045, .disable = 0x00000000},
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{.addr = 0x00419ff8, .prod = 0x00000002, .disable = 0x00000000},
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{.addr = 0x00419f90, .prod = 0x00000002, .disable = 0x00000000},
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{.addr = 0x0041be28, .prod = 0x00008242, .disable = 0x00000000},
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{.addr = 0x0041bfe8, .prod = 0x0000c444, .disable = 0x00000000},
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{.addr = 0x0041bed0, .prod = 0x0000c444, .disable = 0x00000000},
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{.addr = 0x00408810, .prod = 0x0000c242, .disable = 0x00000000},
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{.addr = 0x00408a80, .prod = 0x0000c242, .disable = 0x00000000},
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{.addr = 0x004089a8, .prod = 0x0000c242, .disable = 0x00000000},
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};
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/* blcg ltc */
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static const struct gating_desc gp10b_blcg_ltc[] = {
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{.addr = 0x0017e030, .prod = 0x00000044, .disable = 0x00000000},
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{.addr = 0x0017e040, .prod = 0x00000044, .disable = 0x00000000},
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{.addr = 0x0017e3e0, .prod = 0x00000044, .disable = 0x00000000},
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{.addr = 0x0017e3c8, .prod = 0x00000044, .disable = 0x00000000},
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};
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/* blcg pwr_csb */
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||||||
|
static const struct gating_desc gp10b_blcg_pwr_csb[] = {
|
||||||
|
{.addr = 0x00000a70, .prod = 0x00000045, .disable = 0x00000000},
|
||||||
|
};
|
||||||
|
|
||||||
|
/* blcg pmu */
|
||||||
|
static const struct gating_desc gp10b_blcg_pmu[] = {
|
||||||
|
{.addr = 0x0010aa70, .prod = 0x00000045, .disable = 0x00000000},
|
||||||
|
};
|
||||||
|
|
||||||
|
/* blcg Xbar */
|
||||||
|
static const struct gating_desc gp10b_blcg_xbar[] = {
|
||||||
|
{.addr = 0x0013cbe0, .prod = 0x00000042, .disable = 0x00000000},
|
||||||
|
{.addr = 0x0013cc00, .prod = 0x00000042, .disable = 0x00000000},
|
||||||
|
};
|
||||||
|
|
||||||
|
/* pg gr */
|
||||||
|
static const struct gating_desc gp10b_pg_gr[] = {
|
||||||
|
};
|
||||||
|
|
||||||
|
/* inline functions */
|
||||||
|
void gp10b_slcg_bus_load_gating_prod(struct gk20a *g,
|
||||||
|
bool prod)
|
||||||
|
{
|
||||||
|
u32 i;
|
||||||
|
u32 size = sizeof(gp10b_slcg_bus) / sizeof(struct gating_desc);
|
||||||
|
for (i = 0; i < size; i++) {
|
||||||
|
if (prod)
|
||||||
|
gk20a_writel(g, gp10b_slcg_bus[i].addr,
|
||||||
|
gp10b_slcg_bus[i].prod);
|
||||||
|
else
|
||||||
|
gk20a_writel(g, gp10b_slcg_bus[i].addr,
|
||||||
|
gp10b_slcg_bus[i].disable);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
void gp10b_slcg_ce2_load_gating_prod(struct gk20a *g,
|
||||||
|
bool prod)
|
||||||
|
{
|
||||||
|
u32 i;
|
||||||
|
u32 size = sizeof(gp10b_slcg_ce2) / sizeof(struct gating_desc);
|
||||||
|
for (i = 0; i < size; i++) {
|
||||||
|
if (prod)
|
||||||
|
gk20a_writel(g, gp10b_slcg_ce2[i].addr,
|
||||||
|
gp10b_slcg_ce2[i].prod);
|
||||||
|
else
|
||||||
|
gk20a_writel(g, gp10b_slcg_ce2[i].addr,
|
||||||
|
gp10b_slcg_ce2[i].disable);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
void gp10b_slcg_chiplet_load_gating_prod(struct gk20a *g,
|
||||||
|
bool prod)
|
||||||
|
{
|
||||||
|
u32 i;
|
||||||
|
u32 size = sizeof(gp10b_slcg_chiplet) / sizeof(struct gating_desc);
|
||||||
|
for (i = 0; i < size; i++) {
|
||||||
|
if (prod)
|
||||||
|
gk20a_writel(g, gp10b_slcg_chiplet[i].addr,
|
||||||
|
gp10b_slcg_chiplet[i].prod);
|
||||||
|
else
|
||||||
|
gk20a_writel(g, gp10b_slcg_chiplet[i].addr,
|
||||||
|
gp10b_slcg_chiplet[i].disable);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
void gp10b_slcg_ctxsw_firmware_load_gating_prod(struct gk20a *g,
|
||||||
|
bool prod)
|
||||||
|
{
|
||||||
|
}
|
||||||
|
|
||||||
|
void gp10b_slcg_fb_load_gating_prod(struct gk20a *g,
|
||||||
|
bool prod)
|
||||||
|
{
|
||||||
|
u32 i;
|
||||||
|
u32 size = sizeof(gp10b_slcg_fb) / sizeof(struct gating_desc);
|
||||||
|
for (i = 0; i < size; i++) {
|
||||||
|
if (prod)
|
||||||
|
gk20a_writel(g, gp10b_slcg_fb[i].addr,
|
||||||
|
gp10b_slcg_fb[i].prod);
|
||||||
|
else
|
||||||
|
gk20a_writel(g, gp10b_slcg_fb[i].addr,
|
||||||
|
gp10b_slcg_fb[i].disable);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
void gp10b_slcg_fifo_load_gating_prod(struct gk20a *g,
|
||||||
|
bool prod)
|
||||||
|
{
|
||||||
|
u32 i;
|
||||||
|
u32 size = sizeof(gp10b_slcg_fifo) / sizeof(struct gating_desc);
|
||||||
|
for (i = 0; i < size; i++) {
|
||||||
|
if (prod)
|
||||||
|
gk20a_writel(g, gp10b_slcg_fifo[i].addr,
|
||||||
|
gp10b_slcg_fifo[i].prod);
|
||||||
|
else
|
||||||
|
gk20a_writel(g, gp10b_slcg_fifo[i].addr,
|
||||||
|
gp10b_slcg_fifo[i].disable);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
void gr_gp10b_slcg_gr_load_gating_prod(struct gk20a *g,
|
||||||
|
bool prod)
|
||||||
|
{
|
||||||
|
u32 i;
|
||||||
|
u32 size = sizeof(gp10b_slcg_gr) / sizeof(struct gating_desc);
|
||||||
|
for (i = 0; i < size; i++) {
|
||||||
|
if (prod)
|
||||||
|
gk20a_writel(g, gp10b_slcg_gr[i].addr,
|
||||||
|
gp10b_slcg_gr[i].prod);
|
||||||
|
else
|
||||||
|
gk20a_writel(g, gp10b_slcg_gr[i].addr,
|
||||||
|
gp10b_slcg_gr[i].disable);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
void ltc_gp10b_slcg_ltc_load_gating_prod(struct gk20a *g,
|
||||||
|
bool prod)
|
||||||
|
{
|
||||||
|
u32 i;
|
||||||
|
u32 size = sizeof(gp10b_slcg_ltc) / sizeof(struct gating_desc);
|
||||||
|
for (i = 0; i < size; i++) {
|
||||||
|
if (prod)
|
||||||
|
gk20a_writel(g, gp10b_slcg_ltc[i].addr,
|
||||||
|
gp10b_slcg_ltc[i].prod);
|
||||||
|
else
|
||||||
|
gk20a_writel(g, gp10b_slcg_ltc[i].addr,
|
||||||
|
gp10b_slcg_ltc[i].disable);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
void gp10b_slcg_perf_load_gating_prod(struct gk20a *g,
|
||||||
|
bool prod)
|
||||||
|
{
|
||||||
|
u32 i;
|
||||||
|
u32 size = sizeof(gp10b_slcg_perf) / sizeof(struct gating_desc);
|
||||||
|
for (i = 0; i < size; i++) {
|
||||||
|
if (prod)
|
||||||
|
gk20a_writel(g, gp10b_slcg_perf[i].addr,
|
||||||
|
gp10b_slcg_perf[i].prod);
|
||||||
|
else
|
||||||
|
gk20a_writel(g, gp10b_slcg_perf[i].addr,
|
||||||
|
gp10b_slcg_perf[i].disable);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
void gp10b_slcg_priring_load_gating_prod(struct gk20a *g,
|
||||||
|
bool prod)
|
||||||
|
{
|
||||||
|
u32 i;
|
||||||
|
u32 size = sizeof(gp10b_slcg_priring) / sizeof(struct gating_desc);
|
||||||
|
for (i = 0; i < size; i++) {
|
||||||
|
if (prod)
|
||||||
|
gk20a_writel(g, gp10b_slcg_priring[i].addr,
|
||||||
|
gp10b_slcg_priring[i].prod);
|
||||||
|
else
|
||||||
|
gk20a_writel(g, gp10b_slcg_priring[i].addr,
|
||||||
|
gp10b_slcg_priring[i].disable);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
void gp10b_slcg_pwr_csb_load_gating_prod(struct gk20a *g,
|
||||||
|
bool prod)
|
||||||
|
{
|
||||||
|
u32 i;
|
||||||
|
u32 size = sizeof(gp10b_slcg_pwr_csb) / sizeof(struct gating_desc);
|
||||||
|
for (i = 0; i < size; i++) {
|
||||||
|
if (prod)
|
||||||
|
gk20a_writel(g, gp10b_slcg_pwr_csb[i].addr,
|
||||||
|
gp10b_slcg_pwr_csb[i].prod);
|
||||||
|
else
|
||||||
|
gk20a_writel(g, gp10b_slcg_pwr_csb[i].addr,
|
||||||
|
gp10b_slcg_pwr_csb[i].disable);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
void gp10b_slcg_pmu_load_gating_prod(struct gk20a *g,
|
||||||
|
bool prod)
|
||||||
|
{
|
||||||
|
u32 i;
|
||||||
|
u32 size = sizeof(gp10b_slcg_pmu) / sizeof(struct gating_desc);
|
||||||
|
for (i = 0; i < size; i++) {
|
||||||
|
if (prod)
|
||||||
|
gk20a_writel(g, gp10b_slcg_pmu[i].addr,
|
||||||
|
gp10b_slcg_pmu[i].prod);
|
||||||
|
else
|
||||||
|
gk20a_writel(g, gp10b_slcg_pmu[i].addr,
|
||||||
|
gp10b_slcg_pmu[i].disable);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
void gp10b_slcg_therm_load_gating_prod(struct gk20a *g,
|
||||||
|
bool prod)
|
||||||
|
{
|
||||||
|
u32 i;
|
||||||
|
u32 size = sizeof(gp10b_slcg_therm) / sizeof(struct gating_desc);
|
||||||
|
for (i = 0; i < size; i++) {
|
||||||
|
if (prod)
|
||||||
|
gk20a_writel(g, gp10b_slcg_therm[i].addr,
|
||||||
|
gp10b_slcg_therm[i].prod);
|
||||||
|
else
|
||||||
|
gk20a_writel(g, gp10b_slcg_therm[i].addr,
|
||||||
|
gp10b_slcg_therm[i].disable);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
void gp10b_slcg_xbar_load_gating_prod(struct gk20a *g,
|
||||||
|
bool prod)
|
||||||
|
{
|
||||||
|
u32 i;
|
||||||
|
u32 size = sizeof(gp10b_slcg_xbar) / sizeof(struct gating_desc);
|
||||||
|
for (i = 0; i < size; i++) {
|
||||||
|
if (prod)
|
||||||
|
gk20a_writel(g, gp10b_slcg_xbar[i].addr,
|
||||||
|
gp10b_slcg_xbar[i].prod);
|
||||||
|
else
|
||||||
|
gk20a_writel(g, gp10b_slcg_xbar[i].addr,
|
||||||
|
gp10b_slcg_xbar[i].disable);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
void gp10b_blcg_bus_load_gating_prod(struct gk20a *g,
|
||||||
|
bool prod)
|
||||||
|
{
|
||||||
|
u32 i;
|
||||||
|
u32 size = sizeof(gp10b_blcg_bus) / sizeof(struct gating_desc);
|
||||||
|
for (i = 0; i < size; i++) {
|
||||||
|
if (prod)
|
||||||
|
gk20a_writel(g, gp10b_blcg_bus[i].addr,
|
||||||
|
gp10b_blcg_bus[i].prod);
|
||||||
|
else
|
||||||
|
gk20a_writel(g, gp10b_blcg_bus[i].addr,
|
||||||
|
gp10b_blcg_bus[i].disable);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
void gp10b_blcg_ctxsw_firmware_load_gating_prod(struct gk20a *g,
|
||||||
|
bool prod)
|
||||||
|
{
|
||||||
|
u32 i;
|
||||||
|
u32 size = sizeof(gp10b_blcg_ctxsw_prog) / sizeof(struct gating_desc);
|
||||||
|
for (i = 0; i < size; i++) {
|
||||||
|
if (prod)
|
||||||
|
gk20a_writel(g, gp10b_blcg_ctxsw_prog[i].addr,
|
||||||
|
gp10b_blcg_ctxsw_prog[i].prod);
|
||||||
|
else
|
||||||
|
gk20a_writel(g, gp10b_blcg_ctxsw_prog[i].addr,
|
||||||
|
gp10b_blcg_ctxsw_prog[i].disable);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
void gp10b_blcg_fb_load_gating_prod(struct gk20a *g,
|
||||||
|
bool prod)
|
||||||
|
{
|
||||||
|
u32 i;
|
||||||
|
u32 size = sizeof(gp10b_blcg_fb) / sizeof(struct gating_desc);
|
||||||
|
for (i = 0; i < size; i++) {
|
||||||
|
if (prod)
|
||||||
|
gk20a_writel(g, gp10b_blcg_fb[i].addr,
|
||||||
|
gp10b_blcg_fb[i].prod);
|
||||||
|
else
|
||||||
|
gk20a_writel(g, gp10b_blcg_fb[i].addr,
|
||||||
|
gp10b_blcg_fb[i].disable);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
void gp10b_blcg_fifo_load_gating_prod(struct gk20a *g,
|
||||||
|
bool prod)
|
||||||
|
{
|
||||||
|
u32 i;
|
||||||
|
u32 size = sizeof(gp10b_blcg_fifo) / sizeof(struct gating_desc);
|
||||||
|
for (i = 0; i < size; i++) {
|
||||||
|
if (prod)
|
||||||
|
gk20a_writel(g, gp10b_blcg_fifo[i].addr,
|
||||||
|
gp10b_blcg_fifo[i].prod);
|
||||||
|
else
|
||||||
|
gk20a_writel(g, gp10b_blcg_fifo[i].addr,
|
||||||
|
gp10b_blcg_fifo[i].disable);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
void gp10b_blcg_gr_load_gating_prod(struct gk20a *g,
|
||||||
|
bool prod)
|
||||||
|
{
|
||||||
|
u32 i;
|
||||||
|
u32 size = sizeof(gp10b_blcg_gr) / sizeof(struct gating_desc);
|
||||||
|
for (i = 0; i < size; i++) {
|
||||||
|
if (prod)
|
||||||
|
gk20a_writel(g, gp10b_blcg_gr[i].addr,
|
||||||
|
gp10b_blcg_gr[i].prod);
|
||||||
|
else
|
||||||
|
gk20a_writel(g, gp10b_blcg_gr[i].addr,
|
||||||
|
gp10b_blcg_gr[i].disable);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
void gp10b_blcg_ltc_load_gating_prod(struct gk20a *g,
|
||||||
|
bool prod)
|
||||||
|
{
|
||||||
|
u32 i;
|
||||||
|
u32 size = sizeof(gp10b_blcg_ltc) / sizeof(struct gating_desc);
|
||||||
|
for (i = 0; i < size; i++) {
|
||||||
|
if (prod)
|
||||||
|
gk20a_writel(g, gp10b_blcg_ltc[i].addr,
|
||||||
|
gp10b_blcg_ltc[i].prod);
|
||||||
|
else
|
||||||
|
gk20a_writel(g, gp10b_blcg_ltc[i].addr,
|
||||||
|
gp10b_blcg_ltc[i].disable);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
void gp10b_blcg_pwr_csb_load_gating_prod(struct gk20a *g,
|
||||||
|
bool prod)
|
||||||
|
{
|
||||||
|
u32 i;
|
||||||
|
u32 size = sizeof(gp10b_blcg_pwr_csb) / sizeof(struct gating_desc);
|
||||||
|
for (i = 0; i < size; i++) {
|
||||||
|
if (prod)
|
||||||
|
gk20a_writel(g, gp10b_blcg_pwr_csb[i].addr,
|
||||||
|
gp10b_blcg_pwr_csb[i].prod);
|
||||||
|
else
|
||||||
|
gk20a_writel(g, gp10b_blcg_pwr_csb[i].addr,
|
||||||
|
gp10b_blcg_pwr_csb[i].disable);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
void gp10b_blcg_pmu_load_gating_prod(struct gk20a *g,
|
||||||
|
bool prod)
|
||||||
|
{
|
||||||
|
u32 i;
|
||||||
|
u32 size = sizeof(gp10b_blcg_pmu) / sizeof(struct gating_desc);
|
||||||
|
for (i = 0; i < size; i++) {
|
||||||
|
if (prod)
|
||||||
|
gk20a_writel(g, gp10b_blcg_pmu[i].addr,
|
||||||
|
gp10b_blcg_pmu[i].prod);
|
||||||
|
else
|
||||||
|
gk20a_writel(g, gp10b_blcg_pmu[i].addr,
|
||||||
|
gp10b_blcg_pmu[i].disable);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
void gp10b_blcg_xbar_load_gating_prod(struct gk20a *g,
|
||||||
|
bool prod)
|
||||||
|
{
|
||||||
|
u32 i;
|
||||||
|
u32 size = sizeof(gp10b_blcg_xbar) / sizeof(struct gating_desc);
|
||||||
|
for (i = 0; i < size; i++) {
|
||||||
|
if (prod)
|
||||||
|
gk20a_writel(g, gp10b_blcg_xbar[i].addr,
|
||||||
|
gp10b_blcg_xbar[i].prod);
|
||||||
|
else
|
||||||
|
gk20a_writel(g, gp10b_blcg_xbar[i].addr,
|
||||||
|
gp10b_blcg_xbar[i].disable);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
void gr_gp10b_pg_gr_load_gating_prod(struct gk20a *g,
|
||||||
|
bool prod)
|
||||||
|
{
|
||||||
|
u32 i;
|
||||||
|
u32 size = sizeof(gp10b_pg_gr) / sizeof(struct gating_desc);
|
||||||
|
for (i = 0; i < size; i++) {
|
||||||
|
if (prod)
|
||||||
|
gk20a_writel(g, gp10b_pg_gr[i].addr,
|
||||||
|
gp10b_pg_gr[i].prod);
|
||||||
|
else
|
||||||
|
gk20a_writel(g, gp10b_pg_gr[i].addr,
|
||||||
|
gp10b_pg_gr[i].disable);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
#endif /* __gp10b_gating_reglist_h__ */
|
||||||
87
drivers/gpu/nvgpu/gp10b/gp10b_gating_reglist.h
Normal file
87
drivers/gpu/nvgpu/gp10b/gp10b_gating_reglist.h
Normal file
@@ -0,0 +1,87 @@
|
|||||||
|
/*
|
||||||
|
* Copyright (c) 2015, NVIDIA Corporation. All rights reserved.
|
||||||
|
*
|
||||||
|
* This program is free software; you can redistribute it and/or modify it
|
||||||
|
* under the terms and conditions of the GNU General Public License,
|
||||||
|
* version 2, as published by the Free Software Foundation.
|
||||||
|
*
|
||||||
|
* This program is distributed in the hope it will be useful, but WITHOUT
|
||||||
|
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||||
|
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||||
|
* more details.
|
||||||
|
*
|
||||||
|
* You should have received a copy of the GNU General Public License
|
||||||
|
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||||
|
*/
|
||||||
|
|
||||||
|
#include "gk20a/gk20a.h"
|
||||||
|
|
||||||
|
void gp10b_slcg_bus_load_gating_prod(struct gk20a *g,
|
||||||
|
bool prod);
|
||||||
|
|
||||||
|
void gp10b_slcg_chiplet_load_gating_prod(struct gk20a *g,
|
||||||
|
bool prod);
|
||||||
|
|
||||||
|
void gp10b_slcg_ctxsw_firmware_load_gating_prod(struct gk20a *g,
|
||||||
|
bool prod);
|
||||||
|
|
||||||
|
void gp10b_slcg_fb_load_gating_prod(struct gk20a *g,
|
||||||
|
bool prod);
|
||||||
|
|
||||||
|
void gp10b_slcg_fifo_load_gating_prod(struct gk20a *g,
|
||||||
|
bool prod);
|
||||||
|
|
||||||
|
void gr_gp10b_slcg_gr_load_gating_prod(struct gk20a *g,
|
||||||
|
bool prod);
|
||||||
|
|
||||||
|
void ltc_gp10b_slcg_ltc_load_gating_prod(struct gk20a *g,
|
||||||
|
bool prod);
|
||||||
|
|
||||||
|
void gp10b_slcg_perf_load_gating_prod(struct gk20a *g,
|
||||||
|
bool prod);
|
||||||
|
|
||||||
|
void gp10b_slcg_priring_load_gating_prod(struct gk20a *g,
|
||||||
|
bool prod);
|
||||||
|
|
||||||
|
void gp10b_slcg_pwr_csb_load_gating_prod(struct gk20a *g,
|
||||||
|
bool prod);
|
||||||
|
|
||||||
|
void gp10b_slcg_pmu_load_gating_prod(struct gk20a *g,
|
||||||
|
bool prod);
|
||||||
|
|
||||||
|
void gp10b_slcg_therm_load_gating_prod(struct gk20a *g,
|
||||||
|
bool prod);
|
||||||
|
|
||||||
|
void gp10b_slcg_xbar_load_gating_prod(struct gk20a *g,
|
||||||
|
bool prod);
|
||||||
|
|
||||||
|
void gp10b_blcg_bus_load_gating_prod(struct gk20a *g,
|
||||||
|
bool prod);
|
||||||
|
|
||||||
|
void gp10b_blcg_ctxsw_firmware_load_gating_prod(struct gk20a *g,
|
||||||
|
bool prod);
|
||||||
|
|
||||||
|
void gp10b_blcg_fb_load_gating_prod(struct gk20a *g,
|
||||||
|
bool prod);
|
||||||
|
|
||||||
|
void gp10b_blcg_fifo_load_gating_prod(struct gk20a *g,
|
||||||
|
bool prod);
|
||||||
|
|
||||||
|
void gp10b_blcg_gr_load_gating_prod(struct gk20a *g,
|
||||||
|
bool prod);
|
||||||
|
|
||||||
|
void gp10b_blcg_ltc_load_gating_prod(struct gk20a *g,
|
||||||
|
bool prod);
|
||||||
|
|
||||||
|
void gp10b_blcg_pwr_csb_load_gating_prod(struct gk20a *g,
|
||||||
|
bool prod);
|
||||||
|
|
||||||
|
void gp10b_blcg_pmu_load_gating_prod(struct gk20a *g,
|
||||||
|
bool prod);
|
||||||
|
|
||||||
|
void gp10b_blcg_xbar_load_gating_prod(struct gk20a *g,
|
||||||
|
bool prod);
|
||||||
|
|
||||||
|
void gr_gp10b_pg_gr_load_gating_prod(struct gk20a *g,
|
||||||
|
bool prod);
|
||||||
|
|
||||||
@@ -29,60 +29,57 @@
|
|||||||
#include "gp10b/pmu_gp10b.h"
|
#include "gp10b/pmu_gp10b.h"
|
||||||
#include "gp10b/gr_ctx_gp10b.h"
|
#include "gp10b/gr_ctx_gp10b.h"
|
||||||
#include "gp10b/fifo_gp10b.h"
|
#include "gp10b/fifo_gp10b.h"
|
||||||
|
#include "gp10b/gp10b_gating_reglist.h"
|
||||||
|
|
||||||
#include "gm20b/gr_gm20b.h"
|
#include "gm20b/gr_gm20b.h"
|
||||||
#include "gm20b/gm20b_gating_reglist.h"
|
|
||||||
#include "gm20b/fifo_gm20b.h"
|
#include "gm20b/fifo_gm20b.h"
|
||||||
#include "gp10b/fifo_gp10b.h"
|
|
||||||
#include "gm20b/pmu_gm20b.h"
|
#include "gm20b/pmu_gm20b.h"
|
||||||
#include "gm20b/clk_gm20b.h"
|
#include "gm20b/clk_gm20b.h"
|
||||||
|
|
||||||
static struct gpu_ops gp10b_ops = {
|
static struct gpu_ops gp10b_ops = {
|
||||||
.clock_gating = {
|
.clock_gating = {
|
||||||
.slcg_bus_load_gating_prod =
|
.slcg_bus_load_gating_prod =
|
||||||
gm20b_slcg_bus_load_gating_prod,
|
gp10b_slcg_bus_load_gating_prod,
|
||||||
.slcg_ce2_load_gating_prod =
|
|
||||||
gm20b_slcg_ce2_load_gating_prod,
|
|
||||||
.slcg_chiplet_load_gating_prod =
|
.slcg_chiplet_load_gating_prod =
|
||||||
gm20b_slcg_chiplet_load_gating_prod,
|
gp10b_slcg_chiplet_load_gating_prod,
|
||||||
.slcg_ctxsw_firmware_load_gating_prod =
|
.slcg_ctxsw_firmware_load_gating_prod =
|
||||||
gm20b_slcg_ctxsw_firmware_load_gating_prod,
|
gp10b_slcg_ctxsw_firmware_load_gating_prod,
|
||||||
.slcg_fb_load_gating_prod =
|
.slcg_fb_load_gating_prod =
|
||||||
gm20b_slcg_fb_load_gating_prod,
|
gp10b_slcg_fb_load_gating_prod,
|
||||||
.slcg_fifo_load_gating_prod =
|
.slcg_fifo_load_gating_prod =
|
||||||
gm20b_slcg_fifo_load_gating_prod,
|
gp10b_slcg_fifo_load_gating_prod,
|
||||||
.slcg_gr_load_gating_prod =
|
.slcg_gr_load_gating_prod =
|
||||||
gr_gm20b_slcg_gr_load_gating_prod,
|
gr_gp10b_slcg_gr_load_gating_prod,
|
||||||
.slcg_ltc_load_gating_prod =
|
.slcg_ltc_load_gating_prod =
|
||||||
ltc_gm20b_slcg_ltc_load_gating_prod,
|
ltc_gp10b_slcg_ltc_load_gating_prod,
|
||||||
.slcg_perf_load_gating_prod =
|
.slcg_perf_load_gating_prod =
|
||||||
gm20b_slcg_perf_load_gating_prod,
|
gp10b_slcg_perf_load_gating_prod,
|
||||||
.slcg_priring_load_gating_prod =
|
.slcg_priring_load_gating_prod =
|
||||||
gm20b_slcg_priring_load_gating_prod,
|
gp10b_slcg_priring_load_gating_prod,
|
||||||
.slcg_pmu_load_gating_prod =
|
.slcg_pmu_load_gating_prod =
|
||||||
gm20b_slcg_pmu_load_gating_prod,
|
gp10b_slcg_pmu_load_gating_prod,
|
||||||
.slcg_therm_load_gating_prod =
|
.slcg_therm_load_gating_prod =
|
||||||
gm20b_slcg_therm_load_gating_prod,
|
gp10b_slcg_therm_load_gating_prod,
|
||||||
.slcg_xbar_load_gating_prod =
|
.slcg_xbar_load_gating_prod =
|
||||||
gm20b_slcg_xbar_load_gating_prod,
|
gp10b_slcg_xbar_load_gating_prod,
|
||||||
.blcg_bus_load_gating_prod =
|
.blcg_bus_load_gating_prod =
|
||||||
gm20b_blcg_bus_load_gating_prod,
|
gp10b_blcg_bus_load_gating_prod,
|
||||||
.blcg_ctxsw_firmware_load_gating_prod =
|
.blcg_ctxsw_firmware_load_gating_prod =
|
||||||
gm20b_blcg_ctxsw_firmware_load_gating_prod,
|
gp10b_blcg_ctxsw_firmware_load_gating_prod,
|
||||||
.blcg_fb_load_gating_prod =
|
.blcg_fb_load_gating_prod =
|
||||||
gm20b_blcg_fb_load_gating_prod,
|
gp10b_blcg_fb_load_gating_prod,
|
||||||
.blcg_fifo_load_gating_prod =
|
.blcg_fifo_load_gating_prod =
|
||||||
gm20b_blcg_fifo_load_gating_prod,
|
gp10b_blcg_fifo_load_gating_prod,
|
||||||
.blcg_gr_load_gating_prod =
|
.blcg_gr_load_gating_prod =
|
||||||
gm20b_blcg_gr_load_gating_prod,
|
gp10b_blcg_gr_load_gating_prod,
|
||||||
.blcg_ltc_load_gating_prod =
|
.blcg_ltc_load_gating_prod =
|
||||||
gm20b_blcg_ltc_load_gating_prod,
|
gp10b_blcg_ltc_load_gating_prod,
|
||||||
.blcg_pwr_csb_load_gating_prod =
|
.blcg_pwr_csb_load_gating_prod =
|
||||||
gm20b_blcg_pwr_csb_load_gating_prod,
|
gp10b_blcg_pwr_csb_load_gating_prod,
|
||||||
.blcg_pmu_load_gating_prod =
|
.blcg_pmu_load_gating_prod =
|
||||||
gm20b_blcg_pmu_load_gating_prod,
|
gp10b_blcg_pmu_load_gating_prod,
|
||||||
.pg_gr_load_gating_prod =
|
.pg_gr_load_gating_prod =
|
||||||
gr_gm20b_pg_gr_load_gating_prod,
|
gr_gp10b_pg_gr_load_gating_prod,
|
||||||
}
|
}
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|||||||
Reference in New Issue
Block a user