gpu: nvgpu: unit: add tests for gp10b engine HAL

Add unit test for the following HAL:
- gp10b_engine_init_ce_info

Jira NVGPU-3695

Change-Id: Id63818b9b2478408f84489cf70c496f4a5645a47
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2253504
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

drivers/gpu/nvgpu/libnvgpu-drv_safe.export

@@ -53,6 +53,7 @@ gp10b_mm_init_bar2_vm
 gp10b_mm_remove_bar2_vm
 gp10b_ramin_init_pdb
 gp10b_device_info_parse_data
+gp10b_engine_init_ce_info
 gp10b_get_num_engine_type_entries
 gp10b_get_device_info
 gp10b_is_engine_ce

userspace/Makefile.sources

@@ -84,6 +84,7 @@ UNITS :=				\
 	$(UNIT_SRC)/fifo/channel/gv11b	\
 	$(UNIT_SRC)/fifo/pbdma		\
 	$(UNIT_SRC)/fifo/engine		\
+	$(UNIT_SRC)/fifo/engine/gp10b	\
 	$(UNIT_SRC)/fifo/engine/gv100	\
 	$(UNIT_SRC)/fifo/engine/gv11b	\
 	$(UNIT_SRC)/fifo/runlist	\

userspace/SWUTS.h

@@ -42,6 +42,7 @@
  *   - @ref SWUTS-fifo-channel-gm20b
  *   - @ref SWUTS-fifo-channel-gv11b
  *   - @ref SWUTS-fifo-engine
+ *   - @ref SWUTS-fifo-engine-gp10b
  *   - @ref SWUTS-fifo-engine-gv100
  *   - @ref SWUTS-fifo-engine-gv11b
  *   - @ref SWUTS-fifo-pbdma

userspace/SWUTS.sources

@@ -12,6 +12,7 @@ INPUT += ../../../userspace/units/fifo/channel/gk20a/nvgpu-channel-gk20a.h
 INPUT += ../../../userspace/units/fifo/channel/gm20b/nvgpu-channel-gm20b.h
 INPUT += ../../../userspace/units/fifo/channel/gv11b/nvgpu-channel-gv11b.h
 INPUT += ../../../userspace/units/fifo/engine/nvgpu-engine.h
+INPUT += ../../../userspace/units/fifo/engine/gp10b/nvgpu-engine-gp10b.h
 INPUT += ../../../userspace/units/fifo/engine/gv100/nvgpu-engine-gv100.h
 INPUT += ../../../userspace/units/fifo/engine/gv11b/nvgpu-engine-gv11b.h
 INPUT += ../../../userspace/units/fifo/pbdma/nvgpu-pbdma.h

userspace/units/fifo/engine/gp10b/Makefile

@@ -0,0 +1,32 @@
+# Copyright (c) 2019, NVIDIA CORPORATION.  All rights reserved.
+#
+# Permission is hereby granted, free of charge, to any person obtaining a
+# copy of this software and associated documentation files (the "Software"),
+# to deal in the Software without restriction, including without limitation
+# the rights to use, copy, modify, merge, publish, distribute, sublicense,
+# and/or sell copies of the Software, and to permit persons to whom the
+# Software is furnished to do so, subject to the following conditions:
+#
+# The above copyright notice and this permission notice shall be included in
+# all copies or substantial portions of the Software.
+#
+# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+# THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+# FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+# DEALINGS IN THE SOFTWARE.
+
+.SUFFIXES:
+
+OBJS   = nvgpu-engine-gp10b.o
+MODULE = nvgpu-engine-gp10b
+
+LIB_PATHS += -lnvgpu-fifo
+include ../../../Makefile.units
+
+lib$(MODULE).so: fifo
+
+fifo:
+	$(MAKE) -C ../..

userspace/units/fifo/engine/gp10b/Makefile.interface.tmk

@@ -0,0 +1,35 @@
+################################### tell Emacs this is a -*- makefile-gmake -*-
+#
+# Copyright (c) 2019, NVIDIA CORPORATION.  All rights reserved.
+#
+# Permission is hereby granted, free of charge, to any person obtaining a
+# copy of this software and associated documentation files (the "Software"),
+# to deal in the Software without restriction, including without limitation
+# the rights to use, copy, modify, merge, publish, distribute, sublicense,
+# and/or sell copies of the Software, and to permit persons to whom the
+# Software is furnished to do so, subject to the following conditions:
+#
+# The above copyright notice and this permission notice shall be included in
+# all copies or substantial portions of the Software.
+#
+# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+# THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+# FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+# DEALINGS IN THE SOFTWARE.
+#
+# tmake for SW Mobile component makefile
+#
+###############################################################################
+
+NVGPU_UNIT_NAME=nvgpu-engine-gp10b
+
+include $(NV_SOURCE)/kernel/nvgpu/userspace/units/Makefile.units.common.interface.tmk
+
+# Local Variables:
+# indent-tabs-mode: t
+# tab-width: 8
+# End:
+# vi: set tabstop=8 noexpandtab:

userspace/units/fifo/engine/gp10b/Makefile.tmk

@@ -0,0 +1,40 @@
+################################### tell Emacs this is a -*- makefile-gmake -*-
+#
+# Copyright (c) 2019, NVIDIA CORPORATION.  All rights reserved.
+#
+# Permission is hereby granted, free of charge, to any person obtaining a
+# copy of this software and associated documentation files (the "Software"),
+# to deal in the Software without restriction, including without limitation
+# the rights to use, copy, modify, merge, publish, distribute, sublicense,
+# and/or sell copies of the Software, and to permit persons to whom the
+# Software is furnished to do so, subject to the following conditions:
+#
+# The above copyright notice and this permission notice shall be included in
+# all copies or substantial portions of the Software.
+#
+# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+# THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+# FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+# DEALINGS IN THE SOFTWARE.
+#
+# tmake for SW Mobile component makefile
+#
+###############################################################################
+
+NVGPU_UNIT_NAME = nvgpu-engine-gp10b
+NVGPU_UNIT_SRCS = nvgpu-engine-gp10b.c
+
+NVGPU_UNIT_INTERFACE_DIRS := \
+	$(NV_SOURCE)/kernel/nvgpu/userspace/units/fifo \
+	$(NV_SOURCE)/kernel/nvgpu/drivers/gpu/nvgpu
+
+include $(NV_SOURCE)/kernel/nvgpu/userspace/units/Makefile.units.common.tmk
+
+# Local Variables:
+# indent-tabs-mode: t
+# tab-width: 8
+# End:
+# vi: set tabstop=8 noexpandtab:

userspace/units/fifo/engine/gp10b/nvgpu-engine-gp10b.c

@@ -0,0 +1,249 @@
+/*
+ * Copyright (c) 2019, NVIDIA CORPORATION.  All rights reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ */
+
+#include <stdlib.h>
+#include <sys/types.h>
+#include <unistd.h>
+
+#include <unit/io.h>
+#include <unit/unit.h>
+
+#include <nvgpu/gk20a.h>
+#include <nvgpu/io.h>
+#include <nvgpu/top.h>
+#include <nvgpu/engines.h>
+#include <nvgpu/engine_status.h>
+
+#include <nvgpu/posix/posix-fault-injection.h>
+
+#include "hal/fifo/engines_gp10b.h"
+
+#include <nvgpu/hw/gp10b/hw_fifo_gp10b.h>
+#include <nvgpu/hw/gp10b/hw_top_gp10b.h>
+
+#include "../../nvgpu-fifo.h"
+#include "nvgpu-engine-gp10b.h"
+
+#ifdef ENGINE_GP10B_UNIT_DEBUG
+#undef unit_verbose
+#define unit_verbose	unit_info
+#else
+#define unit_verbose(unit, msg, ...) \
+	do { \
+		if (0) { \
+			unit_info(unit, msg, ##__VA_ARGS__); \
+		} \
+	} while (0)
+#endif
+
+#define assert(cond)	unit_assert(cond, goto done)
+
+#define branches_str test_fifo_flags_str
+#define pruned test_fifo_subtest_pruned
+
+struct unit_ctx {
+	struct unit_module *m;
+	u32 branches;
+	struct gpu_ops gops;
+};
+
+static struct unit_ctx u;
+
+static inline void subtest_setup(struct unit_module *m, u32 branches)
+{
+	u.branches = branches;
+}
+
+#define F_ENGINE_INIT_CE_INFO_GET_NUM_ENGINES_NULL	BIT(0)
+#define F_ENGINE_INIT_CE_INFO_NO_LCE			BIT(1)
+#define F_ENGINE_INIT_CE_INFO_GET_DEV_INFO_FAIL		BIT(2)
+#define F_ENGINE_INIT_CE_INFO_PBDMA_FIND_FAIL		BIT(3)
+#define F_ENGINE_INIT_CE_INFO_ASYNC_CE			BIT(4)
+#define F_ENGINE_INIT_CE_INFO_GRCE			BIT(5)
+#define F_ENGINE_INIT_CE_INFO_FAULT_ID_0		BIT(6)
+#define F_ENGINE_INIT_CE_INFO_GET_INST_NULL		BIT(7)
+#define F_ENGINE_INIT_CE_INFO_LAST			BIT(8)
+
+static u32 wrap_top_get_num_engine_type_entries(struct gk20a *g,
+		u32 engine_type)
+{
+	u32 branches = u.branches;
+
+	if (engine_type != NVGPU_ENGINE_LCE)
+		goto done;
+
+	if (branches & F_ENGINE_INIT_CE_INFO_NO_LCE) {
+		return 0;
+	}
+
+	if ((branches & F_ENGINE_INIT_CE_INFO_GRCE) ||
+	    (branches & F_ENGINE_INIT_CE_INFO_ASYNC_CE)) {
+		return 1;
+	}
+
+done:
+	return u.gops.top.get_num_engine_type_entries(g, engine_type);
+}
+
+static int wrap_top_get_device_info(struct gk20a *g,
+		struct nvgpu_device_info *dev_info,
+		u32 engine_type, u32 inst_id)
+{
+	u32 branches = u.branches;
+
+	if (engine_type != NVGPU_ENGINE_LCE)
+		goto done;
+
+	if (branches & F_ENGINE_INIT_CE_INFO_GET_DEV_INFO_FAIL) {
+		return -EINVAL;
+	}
+
+	if (branches & F_ENGINE_INIT_CE_INFO_FAULT_ID_0) {
+		dev_info->fault_id = 0;
+	} else {
+		dev_info->fault_id = 1;
+	}
+
+	if (branches & F_ENGINE_INIT_CE_INFO_GRCE) {
+		dev_info->runlist_id = nvgpu_engine_get_gr_runlist_id(g);
+		dev_info->engine_id = 1;
+		dev_info->engine_type = top_device_info_type_enum_lce_v();
+		return 0;
+	}
+
+	if (branches & F_ENGINE_INIT_CE_INFO_ASYNC_CE) {
+		dev_info->runlist_id = 1;
+		dev_info->engine_id = 1;
+		dev_info->engine_type = top_device_info_type_enum_lce_v();
+		return 0;
+	}
+
+done:
+	return u.gops.top.get_device_info(g, dev_info, engine_type, inst_id);
+
+}
+
+static bool wrap_pbdma_find_for_runlist(struct gk20a *g,
+			u32 runlist_id, u32 *pbdma_id)
+{
+	if (u.branches & F_ENGINE_INIT_CE_INFO_PBDMA_FIND_FAIL)
+		return false;
+
+	return u.gops.pbdma.find_for_runlist(g, runlist_id, pbdma_id);
+}
+
+static u32 wrap_top_get_ce_inst_id(struct gk20a *g, u32 engine_type)
+{
+	if (u.gops.top.get_ce_inst_id != NULL) {
+		return u.gops.top.get_ce_inst_id(g, engine_type);
+	}
+
+	return 0;
+}
+
+int test_gp10b_engine_init_ce_info(struct unit_module *m,
+		struct gk20a *g, void *args)
+{
+	int ret = UNIT_FAIL;
+	struct nvgpu_fifo *f = &g->fifo;
+	int err;
+	u32 fail =
+		F_ENGINE_INIT_CE_INFO_GET_DEV_INFO_FAIL |
+		F_ENGINE_INIT_CE_INFO_PBDMA_FIND_FAIL;
+	const char *labels[] = {
+		"get_num_engines_null",
+		"no_lce",
+		"get_dev_info_fail",
+		"pbdma_find_fail",
+		"async_ce",
+		"grce",
+		"fault_id_0",
+		"get_inst_null",
+	};
+	u32 prune =
+		F_ENGINE_INIT_CE_INFO_GET_NUM_ENGINES_NULL |
+		F_ENGINE_INIT_CE_INFO_NO_LCE | fail;
+	u32 branches;
+	u32 num_lce;
+
+	u.m = m;
+	u.gops = g->ops;
+
+	assert(f->num_engines > 0);
+	assert(f->engine_info[0].engine_enum == NVGPU_ENGINE_GR);
+
+	g->ops.top.get_device_info = wrap_top_get_device_info;
+	g->ops.pbdma.find_for_runlist = wrap_pbdma_find_for_runlist;
+
+	for (branches = 0U; branches < F_ENGINE_INIT_CE_INFO_LAST; branches++) {
+
+		if (pruned(branches, prune)) {
+			unit_verbose(m, "%s branches=%s (pruned)\n",
+				__func__, branches_str(branches, labels));
+			continue;
+		}
+		subtest_setup(m, branches);
+		unit_verbose(m, "%s branches=%s\n", __func__,
+			branches_str(branches, labels));
+
+		g->ops.top.get_num_engine_type_entries =
+			branches & F_ENGINE_INIT_CE_INFO_GET_NUM_ENGINES_NULL ?
+			NULL : wrap_top_get_num_engine_type_entries;
+
+		g->ops.top.get_ce_inst_id =
+			branches & F_ENGINE_INIT_CE_INFO_GET_INST_NULL ?
+			NULL : wrap_top_get_ce_inst_id;
+
+		/* keep only GR engine */
+		f->num_engines = 1;
+
+		err = gp10b_engine_init_ce_info(f);
+
+		if ((branches & F_ENGINE_INIT_CE_INFO_GET_NUM_ENGINES_NULL) ||
+		    (branches & F_ENGINE_INIT_CE_INFO_NO_LCE)) {
+			num_lce = 0;
+		} else {
+			num_lce = g->ops.top.get_num_engine_type_entries(g, NVGPU_ENGINE_LCE);
+		}
+
+		if (branches & fail) {
+			assert(err != 0);
+			assert(f->num_engines < (1 + num_lce));
+		} else {
+			assert(err == 0);
+			assert(f->num_engines = (1 + num_lce));
+		}
+	}
+
+	ret = UNIT_SUCCESS;
+done:
+	g->ops = u.gops;
+	return ret;
+}
+
+struct unit_module_test nvgpu_engine_gp10b_tests[] = {
+	UNIT_TEST(init_support, test_fifo_init_support, NULL, 0),
+	UNIT_TEST(engine_init_ce_info, test_gp10b_engine_init_ce_info, NULL, 0),
+	UNIT_TEST(remove_support, test_fifo_remove_support, NULL, 0),
+};
+
+UNIT_MODULE(nvgpu_engine_gp10b, nvgpu_engine_gp10b_tests, UNIT_PRIO_NVGPU_TEST);

userspace/units/fifo/engine/gp10b/nvgpu-engine-gp10b.h

@@ -0,0 +1,70 @@
+/*
+ * Copyright (c) 2019, NVIDIA CORPORATION.  All rights reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ */
+#ifndef UNIT_NVGPU_ENGINE_GP10B_H
+#define UNIT_NVGPU_ENGINE_GP10B_H
+
+#include <nvgpu/types.h>
+
+struct unit_module;
+struct gk20a;
+
+/** @addtogroup SWUTS-fifo-engine-gp10b
+ *  @{
+ *
+ * Software Unit Test Specification for fifo/engine/gp10b
+ */
+
+/**
+ * Test specification for: test_gp10b_engine_init_ce_info
+ *
+ * Description: Branch coverage for gp10b_engine_init_ce_info
+ *
+ * Test Type: Feature based
+ *
+ * Input: test_fifo_init_support has run..
+ *
+ * Steps:
+ * - Check valid cases for gp10b_engine_init_ce_info:
+ *   - Check GRCE case (runlist shared with GR engine).
+ *   - Check fault_id adjustment for GRCE (0 -> 0x1b).
+ *   - Check ASYCNC CE case (runlist NOT shared with GR engine).
+ *   In valid cases, check that function returns 0 and that expected number
+ *   of CE engines has been added.
+ *
+ * - Use stubs to check failure cases for gp10b_engine_init_ce_info:
+ *   - g->ops.top.get_num_engine_type_entries is NULL.
+ *   - g->ops.top.get_num_engine_type_entries returns 0.
+ *   - Failure to get device info with g->ops.top.get_device_info.
+ *   - Failure to find PBDMA servicing engine runlist (i.e. failure of
+ *     g->ops.pbdma.find_for_runlist).
+ *   In all failure cases, check that error code is returned.
+ *
+ * Output: Returns PASS if all branches gave expected results. FAIL otherwise.
+ */
+int test_gp10b_engine_init_ce_info(struct unit_module *m,
+		struct gk20a *g, void *args);
+
+/**
+ * @}
+ */
+
+#endif /* UNIT_NVGPU_ENGINE_GP10B_H */