diff --git a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c index 606a58a67..8943f907b 100644 --- a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c @@ -3125,24 +3125,32 @@ int gk20a_fifo_disable_all_engine_activity(struct gk20a *g, return ret; } -static void gk20a_fifo_runlist_reset_engines(struct gk20a *g, u32 runlist_id) +u32 gk20a_fifo_runlist_busy_engines(struct gk20a *g, u32 runlist_id) { struct fifo_gk20a *f = &g->fifo; u32 engines = 0; unsigned int i; for (i = 0; i < f->num_engines; i++) { - u32 active_engine_id = g->fifo.active_engines_list[i]; - u32 status = gk20a_readl(g, fifo_engine_status_r(active_engine_id)); + u32 active_engine_id = f->active_engines_list[i]; + u32 engine_runlist = f->engine_info[active_engine_id].runlist_id; + u32 status_reg = fifo_engine_status_r(active_engine_id); + u32 status = gk20a_readl(g, status_reg); bool engine_busy = fifo_engine_status_engine_v(status) == fifo_engine_status_engine_busy_v(); - if (engine_busy && - (f->engine_info[active_engine_id].runlist_id == runlist_id)) { + if (engine_busy && engine_runlist == runlist_id) { engines |= BIT(active_engine_id); } } + return engines; +} + +static void gk20a_fifo_runlist_reset_engines(struct gk20a *g, u32 runlist_id) +{ + u32 engines = g->ops.fifo.runlist_busy_engines(g, runlist_id); + if (engines != 0U) { gk20a_fifo_recover(g, engines, ~(u32)0, false, false, true, RC_TYPE_RUNLIST_UPDATE_TIMEOUT); diff --git a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.h b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.h index 8bcd3f578..b6d9c02e0 100644 --- a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.h @@ -434,6 +434,7 @@ u32 nvgpu_runlist_construct_locked(struct fifo_gk20a *f, u32 max_entries); void gk20a_fifo_runlist_hw_submit(struct gk20a *g, u32 runlist_id, u32 count, u32 buffer_index); +u32 gk20a_fifo_runlist_busy_engines(struct gk20a *g, u32 runlist_id); int gk20a_fifo_runlist_wait_pending(struct gk20a *g, u32 runlist_id); int gk20a_init_fifo_setup_sw_common(struct gk20a *g); int gk20a_init_fifo_setup_sw(struct gk20a *g); diff --git a/drivers/gpu/nvgpu/gm20b/hal_gm20b.c b/drivers/gpu/nvgpu/gm20b/hal_gm20b.c index 5ef706a10..9fb2ab46d 100644 --- a/drivers/gpu/nvgpu/gm20b/hal_gm20b.c +++ b/drivers/gpu/nvgpu/gm20b/hal_gm20b.c @@ -484,6 +484,7 @@ static const struct gpu_ops gm20b_ops = { .get_sema_incr_cmd_size = gk20a_fifo_get_sema_incr_cmd_size, .add_sema_cmd = gk20a_fifo_add_sema_cmd, .set_sm_exception_type_mask = gk20a_tsg_set_sm_exception_type_mask, + .runlist_busy_engines = gk20a_fifo_runlist_busy_engines, }, .netlist = { .get_netlist_name = gm20b_netlist_get_name, diff --git a/drivers/gpu/nvgpu/gp106/hal_gp106.c b/drivers/gpu/nvgpu/gp106/hal_gp106.c index 13c71899a..c414f0fdb 100644 --- a/drivers/gpu/nvgpu/gp106/hal_gp106.c +++ b/drivers/gpu/nvgpu/gp106/hal_gp106.c @@ -562,6 +562,7 @@ static const struct gpu_ops gp106_ops = { .get_sema_incr_cmd_size = gk20a_fifo_get_sema_incr_cmd_size, .add_sema_cmd = gk20a_fifo_add_sema_cmd, .set_sm_exception_type_mask = gk20a_tsg_set_sm_exception_type_mask, + .runlist_busy_engines = gk20a_fifo_runlist_busy_engines, }, .netlist = { .get_netlist_name = gp106_netlist_get_name, diff --git a/drivers/gpu/nvgpu/gp10b/hal_gp10b.c b/drivers/gpu/nvgpu/gp10b/hal_gp10b.c index 603636da6..f2e0ed5d4 100644 --- a/drivers/gpu/nvgpu/gp10b/hal_gp10b.c +++ b/drivers/gpu/nvgpu/gp10b/hal_gp10b.c @@ -527,6 +527,7 @@ static const struct gpu_ops gp10b_ops = { .get_sema_incr_cmd_size = gk20a_fifo_get_sema_incr_cmd_size, .add_sema_cmd = gk20a_fifo_add_sema_cmd, .set_sm_exception_type_mask = gk20a_tsg_set_sm_exception_type_mask, + .runlist_busy_engines = gk20a_fifo_runlist_busy_engines, }, .netlist = { .get_netlist_name = gp10b_netlist_get_name, diff --git a/drivers/gpu/nvgpu/gv100/hal_gv100.c b/drivers/gpu/nvgpu/gv100/hal_gv100.c index 9ee0c53ba..60da8dd6b 100644 --- a/drivers/gpu/nvgpu/gv100/hal_gv100.c +++ b/drivers/gpu/nvgpu/gv100/hal_gv100.c @@ -683,6 +683,7 @@ static const struct gpu_ops gv100_ops = { .set_sm_exception_type_mask = gk20a_tsg_set_sm_exception_type_mask, .usermode_base = gv11b_fifo_usermode_base, .doorbell_token = gv11b_fifo_doorbell_token, + .runlist_busy_engines = gk20a_fifo_runlist_busy_engines, }, .netlist = { .get_netlist_name = gv100_netlist_get_name, diff --git a/drivers/gpu/nvgpu/gv11b/hal_gv11b.c b/drivers/gpu/nvgpu/gv11b/hal_gv11b.c index 8f3f8368d..2e5e4f9a7 100644 --- a/drivers/gpu/nvgpu/gv11b/hal_gv11b.c +++ b/drivers/gpu/nvgpu/gv11b/hal_gv11b.c @@ -646,6 +646,7 @@ static const struct gpu_ops gv11b_ops = { .set_sm_exception_type_mask = gk20a_tsg_set_sm_exception_type_mask, .usermode_base = gv11b_fifo_usermode_base, .doorbell_token = gv11b_fifo_doorbell_token, + .runlist_busy_engines = gk20a_fifo_runlist_busy_engines, }, .netlist = { .get_netlist_name = gv11b_netlist_get_name, diff --git a/drivers/gpu/nvgpu/include/nvgpu/gk20a.h b/drivers/gpu/nvgpu/include/nvgpu/gk20a.h index 9e65ed009..53e505f02 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/gk20a.h +++ b/drivers/gpu/nvgpu/include/nvgpu/gk20a.h @@ -781,6 +781,7 @@ struct gpu_ops { void (*deinit_pdb_cache_war)(struct gk20a *g); int (*set_sm_exception_type_mask)(struct channel_gk20a *ch, u32 exception_mask); + u32 (*runlist_busy_engines)(struct gk20a *g, u32 runlist_id); } fifo; struct pmu_v { u32 (*get_pmu_cmdline_args_size)(struct nvgpu_pmu *pmu); diff --git a/drivers/gpu/nvgpu/tu104/hal_tu104.c b/drivers/gpu/nvgpu/tu104/hal_tu104.c index c8b69c105..95c403032 100644 --- a/drivers/gpu/nvgpu/tu104/hal_tu104.c +++ b/drivers/gpu/nvgpu/tu104/hal_tu104.c @@ -706,6 +706,7 @@ static const struct gpu_ops tu104_ops = { .init_pdb_cache_war = tu104_init_pdb_cache_war, .deinit_pdb_cache_war = tu104_deinit_pdb_cache_war, .set_sm_exception_type_mask = gk20a_tsg_set_sm_exception_type_mask, + .runlist_busy_engines = gk20a_fifo_runlist_busy_engines, }, .netlist = { .get_netlist_name = tu104_netlist_get_name,