From 97e67bf785b6f22b440dee0a249f8698835149bd Mon Sep 17 00:00:00 2001 From: Philip Elcan Date: Tue, 6 Aug 2019 11:19:11 -0400 Subject: [PATCH] gpu: nvgpu: top: fix CERT-C violations CERT-C Rule INT30-C Requires that unsigned integer operations do not wrap. Fix these violations by using the safe ops. JIRA NVGPU-3868 Change-Id: I3e06f048e87497a4558fcdaf730fe503c817e629 Signed-off-by: Philip Elcan Reviewed-on: https://git-master.nvidia.com/r/2170237 Reviewed-by: svc-mobile-coverity Reviewed-by: svc-mobile-misra Reviewed-by: Alex Waterman GVS: Gerrit_Virtual_Submit Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Deepak Nibade Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/hal/top/top_gp10b_fusa.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/nvgpu/hal/top/top_gp10b_fusa.c b/drivers/gpu/nvgpu/hal/top/top_gp10b_fusa.c index d6e8820cd..d0544f802 100644 --- a/drivers/gpu/nvgpu/hal/top/top_gp10b_fusa.c +++ b/drivers/gpu/nvgpu/hal/top/top_gp10b_fusa.c @@ -83,7 +83,8 @@ u32 gp10b_get_num_engine_type_entries(struct gk20a *g, u32 engine_type) top_device_info_type_enum_v(table_entry)); if (top_device_info_type_enum_v(table_entry) == engine_type) { - num_entries++; + num_entries = nvgpu_safe_add_u32(num_entries, + 1U); } } }