diff --git a/drivers/gpu/nvgpu/gk20a/channel_gk20a.c b/drivers/gpu/nvgpu/gk20a/channel_gk20a.c
index 2c98797df..f9b9c6e69 100644
--- a/drivers/gpu/nvgpu/gk20a/channel_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/channel_gk20a.c
@@ -2229,7 +2229,7 @@ void gk20a_channel_semaphore_wakeup(struct gk20a *g, bool post_events)
 						struct tsg_gk20a *tsg =
 							&g->fifo.tsg[c->tsgid];
 
-						gk20a_tsg_event_id_post_event(tsg,
+						g->ops.fifo.post_event_id(tsg,
 						    NVGPU_EVENT_ID_BLOCKING_SYNC);
 					}
 				}
diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h
index d9e3c97d6..6f99b3f9c 100644
--- a/drivers/gpu/nvgpu/gk20a/gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/gk20a.h
@@ -610,6 +610,7 @@ struct gpu_ops {
 		void (*deinit_eng_method_buffers)(struct gk20a *g,
 						struct tsg_gk20a *tsg);
 		u32 (*get_preempt_timeout)(struct gk20a *g);
+		void (*post_event_id)(struct tsg_gk20a *tsg, int event_id);
 #ifdef CONFIG_TEGRA_GK20A_NVHOST
 		int (*alloc_syncpt_buf)(struct channel_gk20a *c,
 				u32 syncpt_id, struct nvgpu_mem *syncpt_buf);
diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c
index 8f263e677..c64900bd2 100644
--- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c
@@ -5274,7 +5274,7 @@ static int gk20a_gr_handle_semaphore_pending(struct gk20a *g,
 	struct channel_gk20a *ch = &f->channel[isr_data->chid];
 	struct tsg_gk20a *tsg = &g->fifo.tsg[ch->tsgid];
 
-	gk20a_tsg_event_id_post_event(tsg,
+	g->ops.fifo.post_event_id(tsg,
 		NVGPU_EVENT_ID_GR_SEMAPHORE_WRITE_AWAKEN);
 
 	nvgpu_cond_broadcast(&ch->semaphore_wq);
@@ -5818,14 +5818,12 @@ static int gk20a_gr_post_bpt_events(struct gk20a *g, struct channel_gk20a *ch,
 	if (global_esr & gr_gpc0_tpc0_sm_hww_global_esr_bpt_int_pending_f()) {
 		struct tsg_gk20a *tsg = &g->fifo.tsg[ch->tsgid];
 
-		gk20a_tsg_event_id_post_event(tsg,
-			NVGPU_EVENT_ID_BPT_INT);
+		g->ops.fifo.post_event_id(tsg, NVGPU_EVENT_ID_BPT_INT);
 	}
 	if (global_esr & gr_gpc0_tpc0_sm_hww_global_esr_bpt_pause_pending_f()) {
 		struct tsg_gk20a *tsg = &g->fifo.tsg[ch->tsgid];
 
-		gk20a_tsg_event_id_post_event(tsg,
-			NVGPU_EVENT_ID_BPT_PAUSE);
+		g->ops.fifo.post_event_id(tsg, NVGPU_EVENT_ID_BPT_PAUSE);
 	}
 
 	return 0;
diff --git a/drivers/gpu/nvgpu/gm20b/hal_gm20b.c b/drivers/gpu/nvgpu/gm20b/hal_gm20b.c
index 2d53a9269..e390e4dd8 100644
--- a/drivers/gpu/nvgpu/gm20b/hal_gm20b.c
+++ b/drivers/gpu/nvgpu/gm20b/hal_gm20b.c
@@ -431,6 +431,7 @@ static const struct gpu_ops gm20b_ops = {
 		.handle_pbdma_intr_1 = gk20a_fifo_handle_pbdma_intr_1,
 		.tsg_bind_channel = gk20a_tsg_bind_channel,
 		.tsg_unbind_channel = gk20a_fifo_tsg_unbind_channel,
+		.post_event_id = gk20a_tsg_event_id_post_event,
 #ifdef CONFIG_TEGRA_GK20A_NVHOST
 		.alloc_syncpt_buf = gk20a_fifo_alloc_syncpt_buf,
 		.free_syncpt_buf = gk20a_fifo_free_syncpt_buf,
diff --git a/drivers/gpu/nvgpu/gp106/hal_gp106.c b/drivers/gpu/nvgpu/gp106/hal_gp106.c
index a0068a6f8..82ef04611 100644
--- a/drivers/gpu/nvgpu/gp106/hal_gp106.c
+++ b/drivers/gpu/nvgpu/gp106/hal_gp106.c
@@ -491,6 +491,7 @@ static const struct gpu_ops gp106_ops = {
 		.handle_pbdma_intr_1 = gk20a_fifo_handle_pbdma_intr_1,
 		.tsg_bind_channel = gk20a_tsg_bind_channel,
 		.tsg_unbind_channel = gk20a_fifo_tsg_unbind_channel,
+		.post_event_id = gk20a_tsg_event_id_post_event,
 #ifdef CONFIG_TEGRA_GK20A_NVHOST
 		.alloc_syncpt_buf = gk20a_fifo_alloc_syncpt_buf,
 		.free_syncpt_buf = gk20a_fifo_free_syncpt_buf,
diff --git a/drivers/gpu/nvgpu/gp10b/gr_gp10b.c b/drivers/gpu/nvgpu/gp10b/gr_gp10b.c
index 17685f597..8cbda4098 100644
--- a/drivers/gpu/nvgpu/gp10b/gr_gp10b.c
+++ b/drivers/gpu/nvgpu/gp10b/gr_gp10b.c
@@ -1814,8 +1814,8 @@ int gr_gp10b_set_cilp_preempt_pending(struct gk20a *g,
 
 	tsg = &g->fifo.tsg[fault_ch->tsgid];
 
-	gk20a_tsg_event_id_post_event(tsg,
-			NVGPU_EVENT_ID_CILP_PREEMPTION_STARTED);
+	g->ops.fifo.post_event_id(tsg,
+				NVGPU_EVENT_ID_CILP_PREEMPTION_STARTED);
 
 	return 0;
 }
@@ -2036,8 +2036,8 @@ int gr_gp10b_handle_fecs_error(struct gk20a *g,
 
 		tsg = &g->fifo.tsg[ch->tsgid];
 
-		gk20a_tsg_event_id_post_event(tsg,
-			NVGPU_EVENT_ID_CILP_PREEMPTION_COMPLETE);
+		g->ops.fifo.post_event_id(tsg,
+					NVGPU_EVENT_ID_CILP_PREEMPTION_COMPLETE);
 
 		gk20a_channel_put(ch);
 	}
diff --git a/drivers/gpu/nvgpu/gp10b/hal_gp10b.c b/drivers/gpu/nvgpu/gp10b/hal_gp10b.c
index 65fdf7140..783dfcdd0 100644
--- a/drivers/gpu/nvgpu/gp10b/hal_gp10b.c
+++ b/drivers/gpu/nvgpu/gp10b/hal_gp10b.c
@@ -464,6 +464,7 @@ static const struct gpu_ops gp10b_ops = {
 		.handle_pbdma_intr_1 = gk20a_fifo_handle_pbdma_intr_1,
 		.tsg_bind_channel = gk20a_tsg_bind_channel,
 		.tsg_unbind_channel = gk20a_fifo_tsg_unbind_channel,
+		.post_event_id = gk20a_tsg_event_id_post_event,
 #ifdef CONFIG_TEGRA_GK20A_NVHOST
 		.alloc_syncpt_buf = gk20a_fifo_alloc_syncpt_buf,
 		.free_syncpt_buf = gk20a_fifo_free_syncpt_buf,
diff --git a/drivers/gpu/nvgpu/gv100/hal_gv100.c b/drivers/gpu/nvgpu/gv100/hal_gv100.c
index 6598d7f6f..677f2a899 100644
--- a/drivers/gpu/nvgpu/gv100/hal_gv100.c
+++ b/drivers/gpu/nvgpu/gv100/hal_gv100.c
@@ -506,6 +506,7 @@ static const struct gpu_ops gv100_ops = {
 			gv11b_fifo_deinit_eng_method_buffers,
 		.tsg_bind_channel = gk20a_tsg_bind_channel,
 		.tsg_unbind_channel = gk20a_fifo_tsg_unbind_channel,
+		.post_event_id = gk20a_tsg_event_id_post_event,
 #ifdef CONFIG_TEGRA_GK20A_NVHOST
 		.alloc_syncpt_buf = gv11b_fifo_alloc_syncpt_buf,
 		.free_syncpt_buf = gv11b_fifo_free_syncpt_buf,
diff --git a/drivers/gpu/nvgpu/gv11b/hal_gv11b.c b/drivers/gpu/nvgpu/gv11b/hal_gv11b.c
index 700dc7fc4..d55d51ba8 100644
--- a/drivers/gpu/nvgpu/gv11b/hal_gv11b.c
+++ b/drivers/gpu/nvgpu/gv11b/hal_gv11b.c
@@ -522,6 +522,7 @@ static const struct gpu_ops gv11b_ops = {
 			gv11b_fifo_deinit_eng_method_buffers,
 		.tsg_bind_channel = gk20a_tsg_bind_channel,
 		.tsg_unbind_channel = gk20a_fifo_tsg_unbind_channel,
+		.post_event_id = gk20a_tsg_event_id_post_event,
 #ifdef CONFIG_TEGRA_GK20A_NVHOST
 		.alloc_syncpt_buf = gv11b_fifo_alloc_syncpt_buf,
 		.free_syncpt_buf = gv11b_fifo_free_syncpt_buf,
diff --git a/drivers/gpu/nvgpu/vgpu/gp10b/vgpu_hal_gp10b.c b/drivers/gpu/nvgpu/vgpu/gp10b/vgpu_hal_gp10b.c
index f1ced1c81..bfdd07880 100644
--- a/drivers/gpu/nvgpu/vgpu/gp10b/vgpu_hal_gp10b.c
+++ b/drivers/gpu/nvgpu/vgpu/gp10b/vgpu_hal_gp10b.c
@@ -340,6 +340,7 @@ static const struct gpu_ops vgpu_gp10b_ops = {
 		.handle_pbdma_intr_1 = gk20a_fifo_handle_pbdma_intr_1,
 		.tsg_bind_channel = vgpu_tsg_bind_channel,
 		.tsg_unbind_channel = vgpu_tsg_unbind_channel,
+		.post_event_id = gk20a_tsg_event_id_post_event,
 #ifdef CONFIG_TEGRA_GK20A_NVHOST
 		.alloc_syncpt_buf = gk20a_fifo_alloc_syncpt_buf,
 		.free_syncpt_buf = gk20a_fifo_free_syncpt_buf,
diff --git a/drivers/gpu/nvgpu/vgpu/gv11b/vgpu_hal_gv11b.c b/drivers/gpu/nvgpu/vgpu/gv11b/vgpu_hal_gv11b.c
index 76f7b3891..b4e03ecd6 100644
--- a/drivers/gpu/nvgpu/vgpu/gv11b/vgpu_hal_gv11b.c
+++ b/drivers/gpu/nvgpu/vgpu/gv11b/vgpu_hal_gv11b.c
@@ -383,6 +383,7 @@ static const struct gpu_ops vgpu_gv11b_ops = {
 			gv11b_fifo_deinit_eng_method_buffers,
 		.tsg_bind_channel = vgpu_gv11b_tsg_bind_channel,
 		.tsg_unbind_channel = vgpu_tsg_unbind_channel,
+		.post_event_id = gk20a_tsg_event_id_post_event,
 #ifdef CONFIG_TEGRA_GK20A_NVHOST
 		.alloc_syncpt_buf = vgpu_gv11b_fifo_alloc_syncpt_buf,
 		.free_syncpt_buf = gv11b_fifo_free_syncpt_buf,