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gpu: nvgpu: Unified VA space for dGPUs

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Enable the unified address space flag for all dGPUs.

Bug 200105199

Change-Id: I082742344f100bf7d27abf0580ddd6134aae8f90
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1955624
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Alex Waterman
2018-11-21 11:43:30 -08:00
committed by mobile promotions
parent 4c1ece989d
commit 998f13dc8a
1 changed files with 10 additions and 0 deletions
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10
drivers/gpu/nvgpu/os/linux/pci.c
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@@ -101,6 +101,7 @@ static struct gk20a_platform nvgpu_pci_device[] = {
.ch_wdt_timeout_ms = 7000, .ch_wdt_timeout_ms = 7000,
.unify_address_spaces = true,
.honors_aperture = true, .honors_aperture = true,
.dma_mask = DMA_BIT_MASK(40), .dma_mask = DMA_BIT_MASK(40),
.vbios_min_version = 0x86063000, .vbios_min_version = 0x86063000,
@@ -137,6 +138,7 @@ static struct gk20a_platform nvgpu_pci_device[] = {
.ch_wdt_timeout_ms = 7000, .ch_wdt_timeout_ms = 7000,
.unify_address_spaces = true,
.honors_aperture = true, .honors_aperture = true,
.dma_mask = DMA_BIT_MASK(40), .dma_mask = DMA_BIT_MASK(40),
.vbios_min_version = 0x86062d00, .vbios_min_version = 0x86062d00,
@@ -173,6 +175,7 @@ static struct gk20a_platform nvgpu_pci_device[] = {
.ch_wdt_timeout_ms = 7000, .ch_wdt_timeout_ms = 7000,
.unify_address_spaces = true,
.honors_aperture = true, .honors_aperture = true,
.dma_mask = DMA_BIT_MASK(40), .dma_mask = DMA_BIT_MASK(40),
.vbios_min_version = 0x86063000, .vbios_min_version = 0x86063000,
@@ -209,6 +212,7 @@ static struct gk20a_platform nvgpu_pci_device[] = {
.ch_wdt_timeout_ms = 7000, .ch_wdt_timeout_ms = 7000,
.unify_address_spaces = true,
.honors_aperture = true, .honors_aperture = true,
.dma_mask = DMA_BIT_MASK(40), .dma_mask = DMA_BIT_MASK(40),
.vbios_min_version = 0x86065300, .vbios_min_version = 0x86065300,
@@ -245,6 +249,7 @@ static struct gk20a_platform nvgpu_pci_device[] = {
.ch_wdt_timeout_ms = 7000, .ch_wdt_timeout_ms = 7000,
.unify_address_spaces = true,
.honors_aperture = true, .honors_aperture = true,
.dma_mask = DMA_BIT_MASK(40), .dma_mask = DMA_BIT_MASK(40),
.vbios_min_version = 0x88001e00, .vbios_min_version = 0x88001e00,
@@ -279,6 +284,7 @@ static struct gk20a_platform nvgpu_pci_device[] = {
.ch_wdt_timeout_ms = 7000, .ch_wdt_timeout_ms = 7000,
.unify_address_spaces = true,
.honors_aperture = true, .honors_aperture = true,
.dma_mask = DMA_BIT_MASK(40), .dma_mask = DMA_BIT_MASK(40),
.vbios_min_version = 0x88001e00, .vbios_min_version = 0x88001e00,
@@ -313,6 +319,7 @@ static struct gk20a_platform nvgpu_pci_device[] = {
.ch_wdt_timeout_ms = 7000, .ch_wdt_timeout_ms = 7000,
.unify_address_spaces = true,
.honors_aperture = true, .honors_aperture = true,
.dma_mask = DMA_BIT_MASK(40), .dma_mask = DMA_BIT_MASK(40),
.vbios_min_version = 0x88000126, .vbios_min_version = 0x88000126,
@@ -348,6 +355,7 @@ static struct gk20a_platform nvgpu_pci_device[] = {
.ch_wdt_timeout_ms = 7000, .ch_wdt_timeout_ms = 7000,
.unify_address_spaces = true,
.honors_aperture = true, .honors_aperture = true,
.dma_mask = DMA_BIT_MASK(40), .dma_mask = DMA_BIT_MASK(40),
.vbios_min_version = 0x1, .vbios_min_version = 0x1,
@@ -386,6 +394,7 @@ static struct gk20a_platform nvgpu_pci_device[] = {
*/ */
.ch_wdt_timeout_ms = 30000, .ch_wdt_timeout_ms = 30000,
.unify_address_spaces = true,
.honors_aperture = true, .honors_aperture = true,
.dma_mask = DMA_BIT_MASK(40), .dma_mask = DMA_BIT_MASK(40),
.vbios_min_version = 0x1, .vbios_min_version = 0x1,
@@ -420,6 +429,7 @@ static struct gk20a_platform nvgpu_pci_device[] = {
.ch_wdt_timeout_ms = 7000, .ch_wdt_timeout_ms = 7000,
.unify_address_spaces = true,
.honors_aperture = true, .honors_aperture = true,
.dma_mask = DMA_BIT_MASK(40), .dma_mask = DMA_BIT_MASK(40),
.vbios_min_version = 0x90041800, .vbios_min_version = 0x90041800,