gpu: nvgpu: enable stencil zbc

The implementation already exists. This change
adds NVGPU_GR_ZBC_TYPE_STENCIL and plumbs through
the stencil value from NvRmGpuDeviceZbcAddStencil
through NVGPU_GPU_IOCTL_ZBC_SET_TABLE.

Adds cases for querying the stencil values,
enabling NvRmGpuDeviceZbcGetStencilTableEntry.

Bug 3403523
Bug 3395601

Change-Id: I42c9a2967d0433e0bb08343aabeff0fe465f231e
Signed-off-by: Pyarelal Knowles <pknowles@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2554963
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Pyarelal Knowles
2021-06-04 13:26:28 -07:00
committed by mobile promotions
parent d90c5ed371
commit 99a664bda0
4 changed files with 23 additions and 4 deletions

View File

@@ -538,6 +538,9 @@ int vgpu_gr_add_zbc(struct gk20a *g, struct nvgpu_gr_zbc *zbc,
case NVGPU_GR_ZBC_TYPE_DEPTH: case NVGPU_GR_ZBC_TYPE_DEPTH:
p->depth = zbc_val->depth; p->depth = zbc_val->depth;
break; break;
case NVGPU_GR_ZBC_TYPE_STENCIL:
p->stencil = zbc_val->stencil;
break;
default: default:
return -EINVAL; return -EINVAL;
} }
@@ -578,6 +581,9 @@ int vgpu_gr_query_zbc(struct gk20a *g, struct nvgpu_gr_zbc *zbc,
case NVGPU_GR_ZBC_TYPE_DEPTH: case NVGPU_GR_ZBC_TYPE_DEPTH:
query_params->depth = p->depth; query_params->depth = p->depth;
break; break;
case NVGPU_GR_ZBC_TYPE_STENCIL:
query_params->stencil = p->stencil;
break;
case NVGPU_GR_ZBC_TYPE_INVALID: case NVGPU_GR_ZBC_TYPE_INVALID:
query_params->index_size = p->index_size; query_params->index_size = p->index_size;
break; break;

View File

@@ -254,22 +254,25 @@ struct tegra_vgpu_zcull_info_params {
#define TEGRA_VGPU_ZBC_TYPE_INVALID 0 #define TEGRA_VGPU_ZBC_TYPE_INVALID 0
#define TEGRA_VGPU_ZBC_TYPE_COLOR 1 #define TEGRA_VGPU_ZBC_TYPE_COLOR 1
#define TEGRA_VGPU_ZBC_TYPE_DEPTH 2 #define TEGRA_VGPU_ZBC_TYPE_DEPTH 2
#define TEGRA_VGPU_ZBC_TYPE_STENCIL 3
struct tegra_vgpu_zbc_set_table_params { struct tegra_vgpu_zbc_set_table_params {
u32 color_ds[TEGRA_VGPU_ZBC_COLOR_VALUE_SIZE]; u32 color_ds[TEGRA_VGPU_ZBC_COLOR_VALUE_SIZE];
u32 color_l2[TEGRA_VGPU_ZBC_COLOR_VALUE_SIZE]; u32 color_l2[TEGRA_VGPU_ZBC_COLOR_VALUE_SIZE];
u32 depth; u32 depth;
u32 stencil;
u32 format; u32 format;
u32 type; /* color or depth */ u32 type; /* color, depth or stencil */
}; };
struct tegra_vgpu_zbc_query_table_params { struct tegra_vgpu_zbc_query_table_params {
u32 color_ds[TEGRA_VGPU_ZBC_COLOR_VALUE_SIZE]; u32 color_ds[TEGRA_VGPU_ZBC_COLOR_VALUE_SIZE];
u32 color_l2[TEGRA_VGPU_ZBC_COLOR_VALUE_SIZE]; u32 color_l2[TEGRA_VGPU_ZBC_COLOR_VALUE_SIZE];
u32 depth; u32 depth;
u32 stencil;
u32 ref_cnt; u32 ref_cnt;
u32 format; u32 format;
u32 type; /* color or depth */ u32 type; /* color, depth or stencil */
u32 index_size; /* [out] size, [in] index */ u32 index_size; /* [out] size, [in] index */
}; };
#endif #endif

View File

@@ -2307,6 +2307,10 @@ long gk20a_ctrl_dev_ioctl(struct file *filp, unsigned int cmd, unsigned long arg
nvgpu_gr_zbc_set_entry_depth(zbc_val, nvgpu_gr_zbc_set_entry_depth(zbc_val,
set_table_args->depth); set_table_args->depth);
break; break;
case NVGPU_GR_ZBC_TYPE_STENCIL:
nvgpu_gr_zbc_set_entry_stencil(zbc_val,
set_table_args->stencil);
break;
default: default:
err = -EINVAL; err = -EINVAL;
} }
@@ -2349,6 +2353,9 @@ long gk20a_ctrl_dev_ioctl(struct file *filp, unsigned int cmd, unsigned long arg
case NVGPU_GR_ZBC_TYPE_DEPTH: case NVGPU_GR_ZBC_TYPE_DEPTH:
query_table_args->depth = zbc_tbl->depth; query_table_args->depth = zbc_tbl->depth;
break; break;
case NVGPU_GR_ZBC_TYPE_STENCIL:
query_table_args->stencil = zbc_tbl->stencil;
break;
case NVGPU_GR_ZBC_TYPE_INVALID: case NVGPU_GR_ZBC_TYPE_INVALID:
query_table_args->index_size = zbc_tbl->index_size; query_table_args->index_size = zbc_tbl->index_size;
break; break;

View File

@@ -49,22 +49,25 @@ struct nvgpu_gpu_zcull_get_info_args {
#define NVGPU_ZBC_TYPE_INVALID 0 #define NVGPU_ZBC_TYPE_INVALID 0
#define NVGPU_ZBC_TYPE_COLOR 1 #define NVGPU_ZBC_TYPE_COLOR 1
#define NVGPU_ZBC_TYPE_DEPTH 2 #define NVGPU_ZBC_TYPE_DEPTH 2
#define NVGPU_ZBC_TYPE_STENCIL 3
struct nvgpu_gpu_zbc_set_table_args { struct nvgpu_gpu_zbc_set_table_args {
__u32 color_ds[NVGPU_ZBC_COLOR_VALUE_SIZE]; __u32 color_ds[NVGPU_ZBC_COLOR_VALUE_SIZE];
__u32 color_l2[NVGPU_ZBC_COLOR_VALUE_SIZE]; __u32 color_l2[NVGPU_ZBC_COLOR_VALUE_SIZE];
__u32 depth; __u32 depth;
__u32 stencil;
__u32 format; __u32 format;
__u32 type; /* color or depth */ __u32 type; /* color, depth or stencil */
}; };
struct nvgpu_gpu_zbc_query_table_args { struct nvgpu_gpu_zbc_query_table_args {
__u32 color_ds[NVGPU_ZBC_COLOR_VALUE_SIZE]; __u32 color_ds[NVGPU_ZBC_COLOR_VALUE_SIZE];
__u32 color_l2[NVGPU_ZBC_COLOR_VALUE_SIZE]; __u32 color_l2[NVGPU_ZBC_COLOR_VALUE_SIZE];
__u32 depth; __u32 depth;
__u32 stencil;
__u32 ref_cnt; __u32 ref_cnt;
__u32 format; __u32 format;
__u32 type; /* color or depth */ __u32 type; /* color, depth or stencil */
__u32 index_size; /* [out] size, [in] index */ __u32 index_size; /* [out] size, [in] index */
}; };