From 9ad6709d7ecd0c13d9a28701667ec557ddc9537c Mon Sep 17 00:00:00 2001 From: Deepak Nibade Date: Fri, 3 May 2019 16:37:02 +0530 Subject: [PATCH] gpu: nvgpu: fix MISRA 5.7 violation in gr.setup unit Below MISRA 5.7 violation is reported in common.gr.setup unit nvgpu/drivers/gpu/nvgpu/common/gr/gr_setup.c:218: identifier_reuse: Identifier "class" is already used to represent a type. nvgpu/drivers/gpu/nvgpu/include/nvgpu/nvgpu_common.h:27: type_declaration: Declaring a type with identifier "class". Fix this by changing variable name "class" to "class_num" Jira NVGPU-3407 Change-Id: I7517995b105c65c2fa78f4959aad9e3f04585f02 Signed-off-by: Deepak Nibade Reviewed-on: https://git-master.nvidia.com/r/2114363 Reviewed-by: svc-mobile-coverity Reviewed-by: svc-mobile-misra GVS: Gerrit_Virtual_Submit Reviewed-by: Vinod Gopalakrishnakurup Reviewed-by: Alex Waterman Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/common/gr/gr_setup.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/nvgpu/common/gr/gr_setup.c b/drivers/gpu/nvgpu/common/gr/gr_setup.c index e4eed9bb9..680fc4321 100644 --- a/drivers/gpu/nvgpu/common/gr/gr_setup.c +++ b/drivers/gpu/nvgpu/common/gr/gr_setup.c @@ -215,11 +215,11 @@ int nvgpu_gr_setup_set_preemption_mode(struct nvgpu_channel *ch, struct gk20a *g = ch->g; struct nvgpu_tsg *tsg; struct vm_gk20a *vm; - u32 class; + u32 class_num; int err = 0; - class = ch->obj_class; - if (class == 0U) { + class_num = ch->obj_class; + if (class_num == 0U) { return -EINVAL; } @@ -256,7 +256,7 @@ int nvgpu_gr_setup_set_preemption_mode(struct nvgpu_channel *ch, graphics_preempt_mode, compute_preempt_mode); err = nvgpu_gr_obj_ctx_set_ctxsw_preemption_mode(g, g->gr->config, - g->gr->gr_ctx_desc, gr_ctx, vm, class, + g->gr->gr_ctx_desc, gr_ctx, vm, class_num, graphics_preempt_mode, compute_preempt_mode); if (err != 0) { nvgpu_err(g, "set_ctxsw_preemption_mode failed");