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gpu: nvgpu: enable devfreq after finalize poweron
Enabling gpu scaling driver after finalize poweron, will make gpu booting happen at initially set frequency(1GHz). Also doing platform specific init scale after enabling scaling driver. Bug 2049965 Bug 2039013 Bug 200377508 Change-Id: I633f8f5a25d9de18cbb3a022913b8b725ccd87e5 Signed-off-by: seshendra Gadagottu <sgadagottu@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1644703 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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@@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2016-2017, NVIDIA CORPORATION. All rights reserved.
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* Copyright (c) 2016-2018, NVIDIA CORPORATION. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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@@ -27,7 +27,6 @@
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#include <nvgpu/debug.h>
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#include <nvgpu/sizes.h>
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#include "scale.h"
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#include "gk20a/gk20a.h"
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#include "platform_gk20a.h"
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#include "module.h"
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@@ -226,11 +225,6 @@ int nvgpu_probe(struct gk20a *g,
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if (err)
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return err;
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/* Initialise scaling */
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if (IS_ENABLED(CONFIG_GK20A_DEVFREQ))
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gk20a_scale_init(dev);
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if (platform->late_probe) {
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err = platform->late_probe(dev);
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if (err) {
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@@ -264,6 +264,13 @@ int gk20a_pm_finalize_poweron(struct device *dev)
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if (err)
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goto done;
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/* Initialise scaling: it will initialize scaling drive only once */
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if (IS_ENABLED(CONFIG_GK20A_DEVFREQ)) {
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gk20a_scale_init(dev);
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if (platform->initscale)
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platform->initscale(dev);
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}
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trace_gk20a_finalize_poweron_done(dev_name(dev));
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err = nvgpu_init_os_linux_ops(l);
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@@ -177,6 +177,9 @@ struct gk20a_platform {
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/* Called to register GPCPLL with common clk framework */
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int (*clk_register)(struct gk20a *g);
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/* platform specific scale init quirks */
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void (*initscale)(struct device *dev);
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/* Postscale callback is called after frequency change */
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void (*postscale)(struct device *dev,
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unsigned long freq);
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@@ -1,7 +1,7 @@
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/*
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* GK20A Tegra Platform Interface
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*
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* Copyright (c) 2014-2017, NVIDIA CORPORATION. All rights reserved.
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* Copyright (c) 2014-2018, NVIDIA CORPORATION. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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@@ -592,6 +592,9 @@ static void gk20a_tegra_scale_init(struct device *dev)
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if (!profile)
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return;
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if (profile->private_data)
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return;
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emc_params = nvgpu_kzalloc(platform->g, sizeof(*emc_params));
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if (!emc_params)
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return;
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@@ -850,9 +853,6 @@ static int gk20a_tegra_late_probe(struct device *dev)
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/* Cause early VPR resize */
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gk20a_tegra_secure_page_alloc(dev);
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/* Initialise tegra specific scaling quirks */
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gk20a_tegra_scale_init(dev);
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return 0;
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}
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@@ -958,6 +958,7 @@ struct gk20a_platform gm20b_tegra_platform = {
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#endif
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/* frequency scaling configuration */
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.initscale = gk20a_tegra_scale_init,
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.prescale = gk20a_tegra_prescale,
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#ifdef CONFIG_TEGRA_BWMGR
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.postscale = gm20b_tegra_postscale,
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@@ -106,6 +106,9 @@ static void gp10b_tegra_scale_init(struct device *dev)
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if (!profile)
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return;
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if ((struct tegra_bwmgr_client *)profile->private_data)
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return;
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bwmgr_handle = tegra_bwmgr_register(TEGRA_BWMGR_CLIENT_GPU);
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if (!bwmgr_handle)
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return;
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@@ -157,8 +160,6 @@ static int gp10b_tegra_late_probe(struct device *dev)
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/* Cause early VPR resize */
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gk20a_tegra_secure_page_alloc(dev);
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/* Initialise tegra specific scaling quirks */
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gp10b_tegra_scale_init(dev);
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return 0;
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}
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@@ -405,6 +406,7 @@ struct gk20a_platform gp10b_tegra_platform = {
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.get_clk_freqs = gp10b_clk_get_freqs,
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/* frequency scaling configuration */
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.initscale = gp10b_tegra_scale_init,
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.prescale = gp10b_tegra_prescale,
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.postscale = gp10b_tegra_postscale,
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.devfreq_governor = "nvhost_podgov",
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