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gpu: nvgpu: move .exec_regops to only execute regops

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HAL .exec_regops used to first validate regops then execute it, now
moving it to only execute the regops.

- It helps B0CC on HV. On server side it does not track profiler object,
but regops validation uses the profiler, so moving validation to client
side.
- The change also remove ctx_buffer_offset checking in
validate_reg_op_offset. The offset already checked again whitelists
which have be verified when update whitelist. Also vgpu does not have
information of ctx and golden image.
- Added function nvgpu_regops_exec to cover both regops validation and
execution.

Jira GVSCI-10351

Signed-off-by: Richard Zhao <rizhao@nvidia.com>
Change-Id: I434e027290e263a8a64a25a55500f7294038c9c4
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2534252
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: svc_kernel_abi <svc_kernel_abi@nvidia.com>
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Richard Zhao
2021-05-24 18:21:57 -07:00
committed by mobile promotions
parent 08cd42093d
commit 9b66fca165
7 changed files with 58 additions and 58 deletions
Download Patch File Download Diff File Expand all files Collapse all files

3
drivers/gpu/nvgpu/include/nvgpu/gops/debugger.h
View File

@@ -26,9 +26,10 @@
struct gops_regops {
int (*exec_regops)(struct gk20a *g,
struct nvgpu_tsg *tsg,
struct nvgpu_profiler_object *prof,
struct nvgpu_dbg_reg_op *ops,
u32 num_ops,
u32 ctx_wr_count,
u32 ctx_rd_count,
u32 *flags);
const struct regop_offset_range* (
*get_global_whitelist_ranges)(void);

11
drivers/gpu/nvgpu/include/nvgpu/regops.h
View File

@@ -1,7 +1,7 @@
/*
* Tegra GK20A GPU Debugger Driver Register Ops
*
* Copyright (c) 2013-2019, NVIDIA CORPORATION. All rights reserved.
* Copyright (c) 2013-2021, NVIDIA CORPORATION. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
@@ -89,10 +89,17 @@ struct regop_offset_range {
int exec_regops_gk20a(struct gk20a *g,
struct nvgpu_tsg *tsg,
struct nvgpu_profiler_object *prof,
struct nvgpu_dbg_reg_op *ops,
u32 num_ops,
u32 ctx_wr_count,
u32 ctx_rd_count,
u32 *flags);
int nvgpu_regops_exec(struct gk20a *g,
struct nvgpu_tsg *tsg,
struct nvgpu_profiler_object *prof,
struct nvgpu_dbg_reg_op *ops,
u32 num_ops,
u32 *flags);
/* turn seriously unwieldy names -> something shorter */
#define REGOP(x) NVGPU_DBG_REG_OP_##x