diff --git a/drivers/gpu/nvgpu/gm20b/hal_gm20b.c b/drivers/gpu/nvgpu/gm20b/hal_gm20b.c
index 55e0b2210..9ec80dc2f 100644
--- a/drivers/gpu/nvgpu/gm20b/hal_gm20b.c
+++ b/drivers/gpu/nvgpu/gm20b/hal_gm20b.c
@@ -474,7 +474,7 @@ static const struct gpu_ops gm20b_ops = {
 		},
 		.intr = {
 			.enable_hww_exceptions =
-					gm20b_gr_init_enable_hww_exceptions,
+					gm20b_gr_intr_enable_hww_exceptions,
 			.enable_interrupts = gm20b_gr_intr_enable_interrupts,
 			.enable_gpc_exceptions =
 					gm20b_gr_intr_enable_gpc_exceptions,
diff --git a/drivers/gpu/nvgpu/gp10b/hal_gp10b.c b/drivers/gpu/nvgpu/gp10b/hal_gp10b.c
index bbcacdabc..b2b5e5e3d 100644
--- a/drivers/gpu/nvgpu/gp10b/hal_gp10b.c
+++ b/drivers/gpu/nvgpu/gp10b/hal_gp10b.c
@@ -552,7 +552,7 @@ static const struct gpu_ops gp10b_ops = {
 		},
 		.intr = {
 			.enable_hww_exceptions =
-					gm20b_gr_init_enable_hww_exceptions,
+					gm20b_gr_intr_enable_hww_exceptions,
 			.enable_interrupts = gm20b_gr_intr_enable_interrupts,
 			.enable_gpc_exceptions =
 					gm20b_gr_intr_enable_gpc_exceptions,
diff --git a/drivers/gpu/nvgpu/hal/gr/intr/gr_intr_gm20b.c b/drivers/gpu/nvgpu/hal/gr/intr/gr_intr_gm20b.c
index 3d3919dec..03e05e1f5 100644
--- a/drivers/gpu/nvgpu/hal/gr/intr/gr_intr_gm20b.c
+++ b/drivers/gpu/nvgpu/hal/gr/intr/gr_intr_gm20b.c
@@ -29,7 +29,7 @@
 
 #include <nvgpu/hw/gm20b/hw_gr_gm20b.h>
 
-void gm20b_gr_init_enable_hww_exceptions(struct gk20a *g)
+void gm20b_gr_intr_enable_hww_exceptions(struct gk20a *g)
 {
 	/* enable exceptions */
 	nvgpu_writel(g, gr_fe_hww_esr_r(),
diff --git a/drivers/gpu/nvgpu/hal/gr/intr/gr_intr_gm20b.h b/drivers/gpu/nvgpu/hal/gr/intr/gr_intr_gm20b.h
index 80a84028d..64e29c2cc 100644
--- a/drivers/gpu/nvgpu/hal/gr/intr/gr_intr_gm20b.h
+++ b/drivers/gpu/nvgpu/hal/gr/intr/gr_intr_gm20b.h
@@ -28,7 +28,7 @@
 struct gk20a;
 struct nvgpu_gr_config;
 
-void gm20b_gr_init_enable_hww_exceptions(struct gk20a *g);
+void gm20b_gr_intr_enable_hww_exceptions(struct gk20a *g);
 void gm20b_gr_intr_enable_interrupts(struct gk20a *g, bool enable);
 void gm20b_gr_intr_enable_exceptions(struct gk20a *g,
 				     struct nvgpu_gr_config *gr_config,