From 9b728a06c9adf14fbd2ea6f29e4c10da0e2013fa Mon Sep 17 00:00:00 2001 From: Vinod G Date: Thu, 28 Mar 2019 08:11:43 -0700 Subject: [PATCH] gpu: nvgpu: rename gm20b_gr_init_enable_hww_exceptions hal Rename gm20b_gr_init_enable_hww_exceptions hal functon to gm20b_gr_intr_enable_hww_exceptions as this function belongs to gr.intr unit JIRA NVGPU-2951 Change-Id: I2be611db6a66be899a7a562f4c4e2860522acb1d Signed-off-by: Vinod G Reviewed-on: https://git-master.nvidia.com/r/2083965 Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/gm20b/hal_gm20b.c | 2 +- drivers/gpu/nvgpu/gp10b/hal_gp10b.c | 2 +- drivers/gpu/nvgpu/hal/gr/intr/gr_intr_gm20b.c | 2 +- drivers/gpu/nvgpu/hal/gr/intr/gr_intr_gm20b.h | 2 +- 4 files changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/nvgpu/gm20b/hal_gm20b.c b/drivers/gpu/nvgpu/gm20b/hal_gm20b.c index 55e0b2210..9ec80dc2f 100644 --- a/drivers/gpu/nvgpu/gm20b/hal_gm20b.c +++ b/drivers/gpu/nvgpu/gm20b/hal_gm20b.c @@ -474,7 +474,7 @@ static const struct gpu_ops gm20b_ops = { }, .intr = { .enable_hww_exceptions = - gm20b_gr_init_enable_hww_exceptions, + gm20b_gr_intr_enable_hww_exceptions, .enable_interrupts = gm20b_gr_intr_enable_interrupts, .enable_gpc_exceptions = gm20b_gr_intr_enable_gpc_exceptions, diff --git a/drivers/gpu/nvgpu/gp10b/hal_gp10b.c b/drivers/gpu/nvgpu/gp10b/hal_gp10b.c index bbcacdabc..b2b5e5e3d 100644 --- a/drivers/gpu/nvgpu/gp10b/hal_gp10b.c +++ b/drivers/gpu/nvgpu/gp10b/hal_gp10b.c @@ -552,7 +552,7 @@ static const struct gpu_ops gp10b_ops = { }, .intr = { .enable_hww_exceptions = - gm20b_gr_init_enable_hww_exceptions, + gm20b_gr_intr_enable_hww_exceptions, .enable_interrupts = gm20b_gr_intr_enable_interrupts, .enable_gpc_exceptions = gm20b_gr_intr_enable_gpc_exceptions, diff --git a/drivers/gpu/nvgpu/hal/gr/intr/gr_intr_gm20b.c b/drivers/gpu/nvgpu/hal/gr/intr/gr_intr_gm20b.c index 3d3919dec..03e05e1f5 100644 --- a/drivers/gpu/nvgpu/hal/gr/intr/gr_intr_gm20b.c +++ b/drivers/gpu/nvgpu/hal/gr/intr/gr_intr_gm20b.c @@ -29,7 +29,7 @@ #include -void gm20b_gr_init_enable_hww_exceptions(struct gk20a *g) +void gm20b_gr_intr_enable_hww_exceptions(struct gk20a *g) { /* enable exceptions */ nvgpu_writel(g, gr_fe_hww_esr_r(), diff --git a/drivers/gpu/nvgpu/hal/gr/intr/gr_intr_gm20b.h b/drivers/gpu/nvgpu/hal/gr/intr/gr_intr_gm20b.h index 80a84028d..64e29c2cc 100644 --- a/drivers/gpu/nvgpu/hal/gr/intr/gr_intr_gm20b.h +++ b/drivers/gpu/nvgpu/hal/gr/intr/gr_intr_gm20b.h @@ -28,7 +28,7 @@ struct gk20a; struct nvgpu_gr_config; -void gm20b_gr_init_enable_hww_exceptions(struct gk20a *g); +void gm20b_gr_intr_enable_hww_exceptions(struct gk20a *g); void gm20b_gr_intr_enable_interrupts(struct gk20a *g, bool enable); void gm20b_gr_intr_enable_exceptions(struct gk20a *g, struct nvgpu_gr_config *gr_config,