diff --git a/drivers/gpu/nvgpu/Makefile.shared.configs b/drivers/gpu/nvgpu/Makefile.shared.configs
index 492b6f91f..2941a3c6d 100644
--- a/drivers/gpu/nvgpu/Makefile.shared.configs
+++ b/drivers/gpu/nvgpu/Makefile.shared.configs
@@ -71,6 +71,14 @@ NVGPU_COMMON_CFLAGS             +=      \
 	-DCONFIG_NVGPU_GR_GOLDEN_CTX_VERIFICATION     \
 	-DCONFIG_NVGPU_BUILD_CONFIGURATION_IS_SAFETY
 
+## For tesing of CTXSW FW error codes manually, enable below configs in safety build.
+## Enable only one config at a time, because only one error can be tested at a time.
+# NVGPU_COMMON_CFLAGS             +=      \
+# 	-DCONFIG_NVGPU_CTXSW_FW_ERROR_WDT_TESTING
+#
+# NVGPU_COMMON_CFLAGS             +=      \
+# 	-DCONFIG_NVGPU_CTXSW_FW_ERROR_CODE_TESTING
+
 endif
 
 #
diff --git a/drivers/gpu/nvgpu/hal/gr/falcon/gr_falcon_gm20b_fusa.c b/drivers/gpu/nvgpu/hal/gr/falcon/gr_falcon_gm20b_fusa.c
index 5737e5d50..bfd7823ac 100644
--- a/drivers/gpu/nvgpu/hal/gr/falcon/gr_falcon_gm20b_fusa.c
+++ b/drivers/gpu/nvgpu/hal/gr/falcon/gr_falcon_gm20b_fusa.c
@@ -43,7 +43,11 @@
 #define CTXSW_MEM_SCRUBBING_TIMEOUT_MAX_US 1000U
 #define CTXSW_MEM_SCRUBBING_TIMEOUT_DEFAULT_US 10U
 
+#ifdef CONFIG_NVGPU_CTXSW_FW_ERROR_WDT_TESTING
+#define CTXSW_WDT_DEFAULT_VALUE 0x1U
+#else
 #define CTXSW_WDT_DEFAULT_VALUE 0x7FFFFFFFU
+#endif
 #define CTXSW_INTR0 BIT32(0)
 #define CTXSW_INTR1 BIT32(1)
 
@@ -541,14 +545,22 @@ int gm20b_gr_falcon_init_ctx_state(struct gk20a *g,
 			   "query golden image size failed");
 		return ret;
 	}
-#ifdef CONFIG_NVGPU_DEBUGGER
+
+#if defined(CONFIG_NVGPU_DEBUGGER) || \
+defined(CONFIG_NVGPU_CTXSW_FW_ERROR_CODE_TESTING)
 	ret = gm20b_gr_falcon_ctrl_ctxsw(g,
 		NVGPU_GR_FALCON_METHOD_CTXSW_DISCOVER_PM_IMAGE_SIZE,
+#ifndef CONFIG_NVGPU_CTXSW_FW_ERROR_CODE_TESTING
 		0, &sizes->pm_ctxsw_image_size);
+#else
+		0, NULL);
+#endif
 	if (ret != 0) {
 		nvgpu_err(g,
 			   "query pm ctx image size failed");
+#ifndef CONFIG_NVGPU_CTXSW_FW_ERROR_CODE_TESTING
 		return ret;
+#endif
 	}
 #endif
 
@@ -715,7 +727,8 @@ int gm20b_gr_falcon_ctrl_ctxsw(struct gk20a *g, u32 fecs_method,
 		break;
 #endif
 
-#ifdef CONFIG_NVGPU_DEBUGGER
+#if defined(CONFIG_NVGPU_DEBUGGER) || \
+defined(CONFIG_NVGPU_CTXSW_FW_ERROR_CODE_TESTING)
 	case NVGPU_GR_FALCON_METHOD_CTXSW_DISCOVER_PM_IMAGE_SIZE:
 		op.method.addr =
 			gr_fecs_method_push_adr_discover_pm_image_size_v();
diff --git a/drivers/gpu/nvgpu/include/nvgpu/gr/gr_falcon.h b/drivers/gpu/nvgpu/include/nvgpu/gr/gr_falcon.h
index 356b8e48e..4f0f3cf8e 100644
--- a/drivers/gpu/nvgpu/include/nvgpu/gr/gr_falcon.h
+++ b/drivers/gpu/nvgpu/include/nvgpu/gr/gr_falcon.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2019, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2019-2020, NVIDIA CORPORATION.  All rights reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a
  * copy of this software and associated documentation files (the "Software"),
@@ -52,7 +52,8 @@ struct nvgpu_gr_falcon;
 #define NVGPU_GR_FALCON_METHOD_CTXSW_DISCOVER_ZCULL_IMAGE_SIZE 	5
 #endif
 
-#ifdef CONFIG_NVGPU_DEBUGGER
+#if defined(CONFIG_NVGPU_DEBUGGER) || \
+defined(CONFIG_NVGPU_CTXSW_FW_ERROR_CODE_TESTING)
 #define NVGPU_GR_FALCON_METHOD_CTXSW_DISCOVER_PM_IMAGE_SIZE	6
 #endif