From 9edbac4494d8dbcf4c58c7f65da9977a64000230 Mon Sep 17 00:00:00 2001 From: Rajesh Devaraj Date: Fri, 18 Mar 2022 18:26:13 +0000 Subject: [PATCH] gpu: nvgpu: add macros related to error reporting This patch does the following: - adds macros related to error reporting - introduces a flag to enable polling for error reporting JIRA NVGPU-8094 Bug 200729736 Change-Id: Ib02e8b7a7765e45eb1b3b3c6dba3720d5421a638 Signed-off-by: Rajesh Devaraj Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2683864 Reviewed-by: svcacv Reviewed-by: Dinesh T Reviewed-by: Ankur Kishore GVS: Gerrit_Virtual_Submit --- drivers/gpu/nvgpu/common/cic/mon/cic_mon_priv.h | 4 ---- drivers/gpu/nvgpu/include/nvgpu/cic_mon.h | 10 +++++++++- drivers/gpu/nvgpu/include/nvgpu/gk20a.h | 4 ++++ 3 files changed, 13 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/nvgpu/common/cic/mon/cic_mon_priv.h b/drivers/gpu/nvgpu/common/cic/mon/cic_mon_priv.h index 511f9545f..beac28a4c 100644 --- a/drivers/gpu/nvgpu/common/cic/mon/cic_mon_priv.h +++ b/drivers/gpu/nvgpu/common/cic/mon/cic_mon_priv.h @@ -32,10 +32,6 @@ struct nvgpu_err_msg; struct gpu_err_header; #define ERR_INJECT_TEST_PATTERN (0xA5U) -#define HW_UNIT_ID_MASK (0xFU) -#define ERR_ID_MASK (0x1FU) -#define ERR_ID_FIELD_SHIFT (4U) -#define CORRECTED_BIT_FIELD_SHIFT (9U) /* * This struct contains members related to error-policy look-up table, diff --git a/drivers/gpu/nvgpu/include/nvgpu/cic_mon.h b/drivers/gpu/nvgpu/include/nvgpu/cic_mon.h index 164ca4480..14555342c 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/cic_mon.h +++ b/drivers/gpu/nvgpu/include/nvgpu/cic_mon.h @@ -27,7 +27,15 @@ #include #include -#define MISC_EC_SW_ERR_CODE_0 0U +#define MISC_EC_SW_ERR_CODE_0 (0U) +#define HW_UNIT_ID_MASK (0xFU) +#define ERR_ID_MASK (0x1FU) +#define ERR_ID_FIELD_SHIFT (4U) +#define CORRECTED_BIT_FIELD_SHIFT (9U) +#define ERR_REPORT_TIMEOUT_US (5000U) +#define SS_WAIT_DURATION_US (500U) +#define MAX_SS_RETRIES (ERR_REPORT_TIMEOUT_US / SS_WAIT_DURATION_US) +#define ERR_TYPE_MASK ((1U) << (CORRECTED_BIT_FIELD_SHIFT)) #define U32_BITS 32U #define DIV_BY_U32_BITS(x) ((x) / U32_BITS) diff --git a/drivers/gpu/nvgpu/include/nvgpu/gk20a.h b/drivers/gpu/nvgpu/include/nvgpu/gk20a.h index 95ed683c6..b361e00aa 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/gk20a.h +++ b/drivers/gpu/nvgpu/include/nvgpu/gk20a.h @@ -906,6 +906,10 @@ struct gk20a { struct nvgpu_nvs_scheduler *scheduler; struct nvgpu_mutex sched_mutex; #endif + +#ifdef CONFIG_NVGPU_ENABLE_MISC_EC + bool enable_polling; +#endif }; /**