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gpu: nvgpu: add recovery capability
Add NVGPU_SUPPORT_RECOVERY and NVGPU_FLAGS_GPU_SUPPORT_RECOVERY, to indicate if recovery is supported. When true, an engine reset is performed in order to recover from an uncorrectable error. When false, the driver enters SW quiesce state. Jira NVGPU-3896 Change-Id: Iea809c13a844641e31ce6306fbd1630ef622bfe9 Signed-off-by: Thomas Fleury <tfleury@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/2175447 Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com> Reviewed-by: Philip Elcan <pelcan@nvidia.com> Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
committed by
Alex Waterman
parent
a9f8b321b1
commit
9f0dff4a03
@@ -249,7 +249,10 @@ int nvgpu_finalize_poweron(struct gk20a *g)
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g->power_on = true;
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g->power_on = true;
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#ifndef CONFIG_NVGPU_RECOVERY
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#ifdef CONFIG_NVGPU_RECOVERY
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nvgpu_set_enabled(g, NVGPU_SUPPORT_RECOVERY, true);
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#else
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nvgpu_set_enabled(g, NVGPU_SUPPORT_RECOVERY, false);
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err = nvgpu_sw_quiesce_init_support(g);
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err = nvgpu_sw_quiesce_init_support(g);
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if (err != 0) {
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if (err != 0) {
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nvgpu_err(g, "failed to init sw-quiesce support");
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nvgpu_err(g, "failed to init sw-quiesce support");
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@@ -207,10 +207,13 @@ struct gk20a;
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/* DGPU Thermal Alert */
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/* DGPU Thermal Alert */
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#define NVGPU_SUPPORT_DGPU_THERMAL_ALERT 79U
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#define NVGPU_SUPPORT_DGPU_THERMAL_ALERT 79U
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/* Recovery support */
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#define NVGPU_SUPPORT_RECOVERY 80U
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/*
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/*
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* Must be greater than the largest bit offset in the above list.
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* Must be greater than the largest bit offset in the above list.
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*/
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*/
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#define NVGPU_MAX_ENABLED_BITS 80U
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#define NVGPU_MAX_ENABLED_BITS 81U
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/**
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/**
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* nvgpu_is_enabled - Check if the passed flag is enabled.
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* nvgpu_is_enabled - Check if the passed flag is enabled.
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@@ -245,6 +245,8 @@ static struct nvgpu_flags_mapping flags_mapping[] = {
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NVGPU_DRIVER_REDUCED_PROFILE},
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NVGPU_DRIVER_REDUCED_PROFILE},
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{NVGPU_GPU_FLAGS_SUPPORT_SET_CTX_MMU_DEBUG_MODE,
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{NVGPU_GPU_FLAGS_SUPPORT_SET_CTX_MMU_DEBUG_MODE,
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NVGPU_SUPPORT_SET_CTX_MMU_DEBUG_MODE},
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NVGPU_SUPPORT_SET_CTX_MMU_DEBUG_MODE},
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{NVGPU_GPU_FLAGS_SUPPORT_RECOVERY,
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NVGPU_SUPPORT_RECOVERY}
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};
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};
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static u64 nvgpu_ctrl_ioctl_gpu_characteristics_flags(struct gk20a *g)
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static u64 nvgpu_ctrl_ioctl_gpu_characteristics_flags(struct gk20a *g)
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@@ -170,6 +170,8 @@ struct nvgpu_gpu_zbc_query_table_args {
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#define NVGPU_GPU_FLAGS_DRIVER_REDUCED_PROFILE (1ULL << 31)
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#define NVGPU_GPU_FLAGS_DRIVER_REDUCED_PROFILE (1ULL << 31)
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/* Set MMU debug mode is available */
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/* Set MMU debug mode is available */
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#define NVGPU_GPU_FLAGS_SUPPORT_SET_CTX_MMU_DEBUG_MODE (1ULL << 32)
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#define NVGPU_GPU_FLAGS_SUPPORT_SET_CTX_MMU_DEBUG_MODE (1ULL << 32)
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/* Recovery is enabled */
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#define NVGPU_GPU_FLAGS_SUPPORT_RECOVERY (1ULL << 33)
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/* SM LRF ECC is enabled */
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/* SM LRF ECC is enabled */
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#define NVGPU_GPU_FLAGS_ECC_ENABLED_SM_LRF (1ULL << 60)
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#define NVGPU_GPU_FLAGS_ECC_ENABLED_SM_LRF (1ULL << 60)
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/* SM SHM ECC is enabled */
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/* SM SHM ECC is enabled */
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