diff --git a/drivers/gpu/nvgpu/Makefile b/drivers/gpu/nvgpu/Makefile
index ed38166c7..f9d88be26 100644
--- a/drivers/gpu/nvgpu/Makefile
+++ b/drivers/gpu/nvgpu/Makefile
@@ -44,7 +44,7 @@ ccflags-y += -DCONFIG_NVGPU_ENGINE_RESET
 endif
 
 ccflags-y += -DCONFIG_NVGPU_DETERMINISTIC_CHANNELS
-ccflags-y += -DCONFIG_NVGPU_TPC_POWERGATE
+ccflags-y += -DCONFIG_NVGPU_STATIC_POWERGATE
 ccflags-y += -DCONFIG_NVGPU_ACR_LEGACY
 ccflags-y += -DCONFIG_NVGPU_ENGINE_QUEUE
 ccflags-y += -DCONFIG_NVGPU_FIFO_ENGINE_ACTIVITY
diff --git a/drivers/gpu/nvgpu/Makefile.shared.configs b/drivers/gpu/nvgpu/Makefile.shared.configs
index 1e462cd75..202c7c8be 100644
--- a/drivers/gpu/nvgpu/Makefile.shared.configs
+++ b/drivers/gpu/nvgpu/Makefile.shared.configs
@@ -195,9 +195,9 @@ NVGPU_COMMON_CFLAGS                 += -DCONFIG_NVGPU_USE_3LSS_ERR_INJECTION
 CONFIG_NVGPU_NVLINK             := 1
 NVGPU_COMMON_CFLAGS             += -DCONFIG_NVGPU_NVLINK
 
-# Enable tpc_powergate support for normal build.
-CONFIG_NVGPU_TPC_POWERGATE      := 1
-NVGPU_COMMON_CFLAGS             += -DCONFIG_NVGPU_TPC_POWERGATE
+# Enable static_powergate support for normal build.
+CONFIG_NVGPU_STATIC_POWERGATE      := 1
+NVGPU_COMMON_CFLAGS             += -DCONFIG_NVGPU_STATIC_POWERGATE
 
 # Enable mssnvlink0 reset control for normal build
 CONFIG_MSSNVLINK0_RST_CONTROL   := 1
diff --git a/drivers/gpu/nvgpu/Makefile.sources b/drivers/gpu/nvgpu/Makefile.sources
index 07121679d..a456c6ec5 100644
--- a/drivers/gpu/nvgpu/Makefile.sources
+++ b/drivers/gpu/nvgpu/Makefile.sources
@@ -726,7 +726,7 @@ ifeq ($(CONFIG_NVGPU_NON_FUSA),1)
 srcs +=	common/power_features/power_features.c
 endif
 
-ifeq ($(CONFIG_NVGPU_TPC_POWERGATE),1)
+ifeq ($(CONFIG_NVGPU_STATIC_POWERGATE),1)
 srcs +=	hal/tpc/tpc_gv11b.c
 endif
 
diff --git a/drivers/gpu/nvgpu/common/init/nvgpu_init.c b/drivers/gpu/nvgpu/common/init/nvgpu_init.c
index 50cc605da..862c0b383 100644
--- a/drivers/gpu/nvgpu/common/init/nvgpu_init.c
+++ b/drivers/gpu/nvgpu/common/init/nvgpu_init.c
@@ -377,20 +377,20 @@ int nvgpu_prepare_poweroff(struct gk20a *g)
 	return ret;
 }
 
-#ifdef CONFIG_NVGPU_TPC_POWERGATE
-static bool have_tpc_pg_lock = false;
+#ifdef CONFIG_NVGPU_STATIC_POWERGATE
+static bool have_static_pg_lock = false;
 
-static int nvgpu_init_acquire_tpc_pg_lock(struct gk20a *g)
+static int nvgpu_init_acquire_static_pg_lock(struct gk20a *g)
 {
-	nvgpu_mutex_acquire(&g->tpc_pg_lock);
-	have_tpc_pg_lock = true;
+	nvgpu_mutex_acquire(&g->static_pg_lock);
+	have_static_pg_lock = true;
 	return 0;
 }
 
-static int nvgpu_init_release_tpc_pg_lock(struct gk20a *g)
+static int nvgpu_init_release_static_pg_lock(struct gk20a *g)
 {
-	nvgpu_mutex_release(&g->tpc_pg_lock);
-	have_tpc_pg_lock = false;
+	nvgpu_mutex_release(&g->static_pg_lock);
+	have_static_pg_lock = false;
 	return 0;
 }
 #endif
@@ -427,7 +427,7 @@ static int nvgpu_init_fbpa_ecc(struct gk20a *g)
 }
 #endif
 
-#ifdef CONFIG_NVGPU_TPC_POWERGATE
+#ifdef CONFIG_NVGPU_STATIC_POWERGATE
 static int nvgpu_init_power_gate(struct gk20a *g)
 {
 	int err;
@@ -793,9 +793,9 @@ int nvgpu_finalize_poweron(struct gk20a *g)
 		NVGPU_INIT_TABLE_ENTRY(g->ops.fifo.fifo_init_support, NO_FLAG),
 		NVGPU_INIT_TABLE_ENTRY(g->ops.therm.elcg_init_idle_filters,
 				       NO_FLAG),
-#ifdef CONFIG_NVGPU_TPC_POWERGATE
+#ifdef CONFIG_NVGPU_STATIC_POWERGATE
 		NVGPU_INIT_TABLE_ENTRY(&nvgpu_init_power_gate, NO_FLAG),
-		NVGPU_INIT_TABLE_ENTRY(&nvgpu_init_acquire_tpc_pg_lock, NO_FLAG),
+		NVGPU_INIT_TABLE_ENTRY(&nvgpu_init_acquire_static_pg_lock, NO_FLAG),
 		NVGPU_INIT_TABLE_ENTRY(&nvgpu_init_power_gate_gr, NO_FLAG),
 #endif
 		NVGPU_INIT_TABLE_ENTRY(&nvgpu_netlist_init_ctx_vars, NO_FLAG),
@@ -826,8 +826,8 @@ int nvgpu_finalize_poweron(struct gk20a *g)
 		 */
 		NVGPU_INIT_TABLE_ENTRY(g->ops.ecc.ecc_finalize_support,
 				       NO_FLAG),
-#ifdef CONFIG_NVGPU_TPC_POWERGATE
-		NVGPU_INIT_TABLE_ENTRY(&nvgpu_init_release_tpc_pg_lock,
+#ifdef CONFIG_NVGPU_STATIC_POWERGATE
+		NVGPU_INIT_TABLE_ENTRY(&nvgpu_init_release_static_pg_lock,
 				       NO_FLAG),
 #endif
 
@@ -886,12 +886,12 @@ int nvgpu_finalize_poweron(struct gk20a *g)
 	return err;
 
 done:
-#ifdef CONFIG_NVGPU_TPC_POWERGATE
-	if (have_tpc_pg_lock) {
-		int release_err = nvgpu_init_release_tpc_pg_lock(g);
+#ifdef CONFIG_NVGPU_STATIC_POWERGATE
+	if (have_static_pg_lock) {
+		int release_err = nvgpu_init_release_static_pg_lock(g);
 
 		if (release_err != 0) {
-			nvgpu_err(g, "failed to release tpc_gp_lock");
+			nvgpu_err(g, "failed to release static_pg_lock");
 		}
 	}
 #endif
diff --git a/drivers/gpu/nvgpu/hal/init/hal_gm20b.c b/drivers/gpu/nvgpu/hal/init/hal_gm20b.c
index a985c240a..53dcef2af 100644
--- a/drivers/gpu/nvgpu/hal/init/hal_gm20b.c
+++ b/drivers/gpu/nvgpu/hal/init/hal_gm20b.c
@@ -1051,7 +1051,7 @@ static const struct gops_top gm20b_ops_top = {
 	.get_num_ltcs = gm20b_top_get_num_ltcs,
 };
 
-#ifdef CONFIG_NVGPU_TPC_POWERGATE
+#ifdef CONFIG_NVGPU_STATIC_POWERGATE
 static const struct gops_tpc gm20b_ops_tpc = {
 	.init_tpc_powergate = NULL,
 	.tpc_gr_pg = NULL,
@@ -1168,7 +1168,7 @@ int gm20b_init_hal(struct gk20a *g)
 	gops->priv_ring = gm20b_ops_priv_ring;
 	gops->fuse = gm20b_ops_fuse;
 	gops->top = gm20b_ops_top;
-#ifdef CONFIG_NVGPU_TPC_POWERGATE
+#ifdef CONFIG_NVGPU_STATIC_POWERGATE
 	gops->tpc = gm20b_ops_tpc;
 #endif
 	gops->grmgr = gm20b_ops_grmgr;
diff --git a/drivers/gpu/nvgpu/hal/init/hal_gp10b.c b/drivers/gpu/nvgpu/hal/init/hal_gp10b.c
index 02f6c1418..666b970dd 100644
--- a/drivers/gpu/nvgpu/hal/init/hal_gp10b.c
+++ b/drivers/gpu/nvgpu/hal/init/hal_gp10b.c
@@ -1150,7 +1150,7 @@ static const struct gops_top gp10b_ops_top = {
 	.get_num_ltcs = gm20b_top_get_num_ltcs,
 };
 
-#ifdef CONFIG_NVGPU_TPC_POWERGATE
+#ifdef CONFIG_NVGPU_STATIC_POWERGATE
 static const struct gops_tpc gp10b_ops_tpc = {
 	.init_tpc_powergate = NULL,
 	.tpc_gr_pg = NULL,
@@ -1257,7 +1257,7 @@ int gp10b_init_hal(struct gk20a *g)
 	gops->priv_ring = gp10b_ops_priv_ring;
 	gops->fuse = gp10b_ops_fuse;
 	gops->top = gp10b_ops_top;
-#ifdef CONFIG_NVGPU_TPC_POWERGATE
+#ifdef CONFIG_NVGPU_STATIC_POWERGATE
 	gops->tpc = gp10b_ops_tpc;
 #endif
 	gops->grmgr = gp10b_ops_grmgr;
diff --git a/drivers/gpu/nvgpu/hal/init/hal_gv11b.c b/drivers/gpu/nvgpu/hal/init/hal_gv11b.c
index ff81447c6..a1789dcf1 100644
--- a/drivers/gpu/nvgpu/hal/init/hal_gv11b.c
+++ b/drivers/gpu/nvgpu/hal/init/hal_gv11b.c
@@ -191,7 +191,7 @@
 
 #include "hal/cic/mon/cic_gv11b.h"
 
-#ifdef CONFIG_NVGPU_TPC_POWERGATE
+#ifdef CONFIG_NVGPU_STATIC_POWERGATE
 #include "hal/tpc/tpc_gv11b.h"
 #endif
 
@@ -1429,7 +1429,7 @@ static const struct gops_top gv11b_ops_top = {
 	.get_num_lce = gv11b_top_get_num_lce,
 };
 
-#ifdef CONFIG_NVGPU_TPC_POWERGATE
+#ifdef CONFIG_NVGPU_STATIC_POWERGATE
 static const struct gops_tpc gv11b_ops_tpc = {
 	.init_tpc_powergate = gv11b_tpc_powergate,
 	.tpc_gr_pg = gv11b_gr_pg_tpc,
@@ -1537,7 +1537,7 @@ int gv11b_init_hal(struct gk20a *g)
 	gops->priv_ring = gv11b_ops_priv_ring;
 	gops->fuse = gv11b_ops_fuse;
 	gops->top = gv11b_ops_top;
-#ifdef CONFIG_NVGPU_TPC_POWERGATE
+#ifdef CONFIG_NVGPU_STATIC_POWERGATE
 	gops->tpc = gv11b_ops_tpc;
 #endif
 	gops->grmgr = gv11b_ops_grmgr;
diff --git a/drivers/gpu/nvgpu/include/nvgpu/gk20a.h b/drivers/gpu/nvgpu/include/nvgpu/gk20a.h
index f0d19d955..a836c1b35 100644
--- a/drivers/gpu/nvgpu/include/nvgpu/gk20a.h
+++ b/drivers/gpu/nvgpu/include/nvgpu/gk20a.h
@@ -424,7 +424,7 @@ struct gk20a {
 	/** @cond DOXYGEN_SHOULD_SKIP_THIS */
 	u32 log_trace;
 
-	struct nvgpu_mutex tpc_pg_lock;
+	struct nvgpu_mutex static_pg_lock;
 	/** @endcond */
 
 	/** Stored HW version info */
diff --git a/drivers/gpu/nvgpu/include/nvgpu/gops/floorsweep.h b/drivers/gpu/nvgpu/include/nvgpu/gops/floorsweep.h
index 61196720a..0bf92f267 100644
--- a/drivers/gpu/nvgpu/include/nvgpu/gops/floorsweep.h
+++ b/drivers/gpu/nvgpu/include/nvgpu/gops/floorsweep.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2020, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2020-2021, NVIDIA CORPORATION.  All rights reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a
  * copy of this software and associated documentation files (the "Software"),
@@ -22,7 +22,7 @@
 #ifndef NVGPU_GOPS_FLOORSWEEP_H
 #define NVGPU_GOPS_FLOORSWEEP_H
 
-#ifdef CONFIG_NVGPU_TPC_POWERGATE
+#ifdef CONFIG_NVGPU_STATIC_POWERGATE
 struct gops_tpc {
 	int (*init_tpc_powergate)(struct gk20a *g, u32 fuse_status);
 	void (*tpc_gr_pg)(struct gk20a *g);
diff --git a/drivers/gpu/nvgpu/include/nvgpu/gpu_ops.h b/drivers/gpu/nvgpu/include/nvgpu/gpu_ops.h
index 7911bddb6..bd88119f6 100644
--- a/drivers/gpu/nvgpu/include/nvgpu/gpu_ops.h
+++ b/drivers/gpu/nvgpu/include/nvgpu/gpu_ops.h
@@ -218,7 +218,7 @@ struct gpu_ops {
 	struct gops_sec2 sec2;
 	struct gops_gsp gsp;
 /** @endcond */
-#ifdef CONFIG_NVGPU_TPC_POWERGATE
+#ifdef CONFIG_NVGPU_STATIC_POWERGATE
 	struct gops_tpc tpc;
 #endif
 	/** Wake up all threads waiting on semaphore wait. */
diff --git a/drivers/gpu/nvgpu/os/linux/driver_common.c b/drivers/gpu/nvgpu/os/linux/driver_common.c
index 0300fe853..e415668a7 100644
--- a/drivers/gpu/nvgpu/os/linux/driver_common.c
+++ b/drivers/gpu/nvgpu/os/linux/driver_common.c
@@ -70,7 +70,7 @@ static void nvgpu_init_vars(struct gk20a *g)
 	nvgpu_mutex_init(&g->dbg_sessions_lock);
 	nvgpu_mutex_init(&g->client_lock);
 	nvgpu_mutex_init(&g->power_lock);
-	nvgpu_mutex_init(&g->tpc_pg_lock);
+	nvgpu_mutex_init(&g->static_pg_lock);
 	nvgpu_mutex_init(&g->clk_arb_enable_lock);
 	nvgpu_mutex_init(&g->cg_pg_lock);
 #if defined(CONFIG_NVGPU_CYCLESTATS)
diff --git a/drivers/gpu/nvgpu/os/linux/sysfs.c b/drivers/gpu/nvgpu/os/linux/sysfs.c
index 8edf03e3a..1d88ecff2 100644
--- a/drivers/gpu/nvgpu/os/linux/sysfs.c
+++ b/drivers/gpu/nvgpu/os/linux/sysfs.c
@@ -863,11 +863,11 @@ static ssize_t tpc_pg_mask_store(struct device *dev,
 	unsigned long val = 0;
 	struct nvgpu_gr_obj_ctx_golden_image *gr_golden_image = NULL;
 
-	nvgpu_mutex_acquire(&g->tpc_pg_lock);
+	nvgpu_mutex_acquire(&g->static_pg_lock);
 
 	if (kstrtoul(buf, 10, &val) < 0) {
 		nvgpu_err(g, "invalid value");
-		nvgpu_mutex_release(&g->tpc_pg_lock);
+		nvgpu_mutex_release(&g->static_pg_lock);
 		return -EINVAL;
 	}
 
@@ -884,7 +884,7 @@ static ssize_t tpc_pg_mask_store(struct device *dev,
 			nvgpu_gr_obj_ctx_get_golden_image_size(gr_golden_image)
 			!= 0) {
 		nvgpu_err(g, "golden image size already initialized");
-		nvgpu_mutex_release(&g->tpc_pg_lock);
+		nvgpu_mutex_release(&g->static_pg_lock);
 		return -ENODEV;
 	}
 	/* checking that the value from userspace is within
@@ -894,11 +894,11 @@ static ssize_t tpc_pg_mask_store(struct device *dev,
 		g->tpc_pg_mask = val;
 	} else {
 		nvgpu_err(g, "TPC-PG mask is invalid");
-		nvgpu_mutex_release(&g->tpc_pg_lock);
+		nvgpu_mutex_release(&g->static_pg_lock);
 		return -EINVAL;
 	}
 exit:
-	nvgpu_mutex_release(&g->tpc_pg_lock);
+	nvgpu_mutex_release(&g->static_pg_lock);
 
 	return count;
 }
diff --git a/userspace/units/acr/nvgpu-acr.c b/userspace/units/acr/nvgpu-acr.c
index b8573b2ac..245a132ea 100644
--- a/userspace/units/acr/nvgpu-acr.c
+++ b/userspace/units/acr/nvgpu-acr.c
@@ -340,7 +340,7 @@ static int prepare_gr_hw_sw(struct unit_module *m, struct gk20a *g)
 
 	err = nvgpu_gr_enable_hw(g);
 	if (err != 0) {
-		nvgpu_mutex_release(&g->tpc_pg_lock);
+		nvgpu_mutex_release(&g->static_pg_lock);
 		unit_return_fail(m, "failed to enable gr");
 	}
 
@@ -399,7 +399,7 @@ int test_acr_bootstrap_hs_acr(struct unit_module *m,
 	return -ENOMEM;
 	}
 
-	nvgpu_mutex_acquire(&g->tpc_pg_lock);
+	nvgpu_mutex_acquire(&g->static_pg_lock);
 
 	/*
 	 * Prepare HW and SW setup needed
@@ -598,7 +598,7 @@ int test_acr_bootstrap_hs_acr(struct unit_module *m,
 					as expected\n");
 	}
 
-	nvgpu_mutex_release(&g->tpc_pg_lock);
+	nvgpu_mutex_release(&g->static_pg_lock);
 
 	return UNIT_SUCCESS;
 }
@@ -619,7 +619,7 @@ int test_acr_construct_execute(struct unit_module *m,
 		unit_return_fail(m, "Test env init failed\n");
 	}
 
-	nvgpu_mutex_acquire(&g->tpc_pg_lock);
+	nvgpu_mutex_acquire(&g->static_pg_lock);
 
 	/*
 	 * Prepare HW and SW setup needed for the test
@@ -693,7 +693,7 @@ int test_acr_construct_execute(struct unit_module *m,
 		unit_return_fail(m, "Bootstrap HS ACR didn't failed as \
 				expected\n");
 	}
-	nvgpu_mutex_release(&g->tpc_pg_lock);
+	nvgpu_mutex_release(&g->static_pg_lock);
 
 	return UNIT_SUCCESS;
 }
@@ -712,7 +712,7 @@ int test_acr_is_lsf_lazy_bootstrap(struct unit_module *m,
 	}
 
 
-	nvgpu_mutex_acquire(&g->tpc_pg_lock);
+	nvgpu_mutex_acquire(&g->static_pg_lock);
 
 	/*
 	 * Prepare HW and SW setup needed for the test
@@ -762,7 +762,7 @@ int test_acr_is_lsf_lazy_bootstrap(struct unit_module *m,
 				expected\n");
 	}
 
-	nvgpu_mutex_release(&g->tpc_pg_lock);
+	nvgpu_mutex_release(&g->static_pg_lock);
 
 	return UNIT_SUCCESS;
 }
@@ -782,7 +782,7 @@ int test_acr_prepare_ucode_blob(struct unit_module *m,
 		unit_return_fail(m, "Test env init failed\n");
 	}
 
-	nvgpu_mutex_acquire(&g->tpc_pg_lock);
+	nvgpu_mutex_acquire(&g->static_pg_lock);
 
 	/*
 	 * Prepare HW and SW setup needed for the test
@@ -882,7 +882,7 @@ int test_acr_prepare_ucode_blob(struct unit_module *m,
 		unit_return_fail(m, "prepare_ucode_blob test failed\n");
 	}
 
-	nvgpu_mutex_release(&g->tpc_pg_lock);
+	nvgpu_mutex_release(&g->static_pg_lock);
 
 	return UNIT_SUCCESS;
 }