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gpu: nvgpu: Move Intr handling common code to CIC
CIC (Central Interrupt controller) will be responsible for the interrupt handling. common.cic unit is the placeholder for all interrupt related code. Move interrupt related defines and Public APIs present in common.mc to common.cic. Note: The common.mc interrupts related struct definitions are not moved as part of this patch. Adapt the code to use interrupt handling related defines and public APIs migrated from common.mc to common.cic JIRA NVGPU-6899 Change-Id: I747e2b556c0dd66d58d74ee5bb36768b9370d276 Signed-off-by: Tejal Kudav <tkudav@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2535618 Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com> Reviewed-by: svc_kernel_abi <svc_kernel_abi@nvidia.com> Reviewed-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> GVS: Gerrit_Virtual_Submit Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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@@ -74,12 +74,12 @@ int test_mc_free_env(struct unit_module *m, struct gk20a *g, void *args);
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/**
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* Test specification for: test_unit_config
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*
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* Description: Validate function of nvgpu_mc_intr_stall_unit_config and
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* nvgpu_mc_intr_nonstall_unit_config.
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* Description: Validate function of nvgpu_cic_intr_stall_unit_config and
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* nvgpu_cic_intr_nonstall_unit_config.
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*
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* Test Type: Feature, Error guessing
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*
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* Targets: nvgpu_mc_intr_stall_unit_config, nvgpu_mc_intr_nonstall_unit_config,
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* Targets: nvgpu_cic_intr_stall_unit_config, nvgpu_cic_intr_nonstall_unit_config,
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* mc_gp10b_intr_stall_unit_config, mc_gp10b_intr_nonstall_unit_config
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*
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* Input: test_mc_setup_env must have been run.
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@@ -88,22 +88,22 @@ int test_mc_free_env(struct unit_module *m, struct gk20a *g, void *args);
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* - Set each of the mock registers for enabling & disabling the stall &
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* non-stall interrupts to 0.
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* - Loop through table of units:
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* - Call nvgpu_mc_intr_stall_unit_config for the unit to enable the stall
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* - Call nvgpu_cic_intr_stall_unit_config for the unit to enable the stall
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* interrupt.
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* - Verify the stall interrupt enable register has the bit set for the unit.
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* - Call nvgpu_mc_intr_stall_unit_config for the unit to disable the interrupt.
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* - Call nvgpu_cic_intr_stall_unit_config for the unit to disable the interrupt.
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* - Verify the stall interrupt disable register has the bit set for the unit.
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* - Call nvgpu_mc_intr_nonstall_unit_config for the unit to enable the
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* - Call nvgpu_cic_intr_nonstall_unit_config for the unit to enable the
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* non-stall interrupt.
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* - Verify the non-stall interrupt enable register has the bit set for the unit.
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* - Call nvgpu_mc_intr_nonstall_unit_config for the unit to disable the interrupt.
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* - Call nvgpu_cic_intr_nonstall_unit_config for the unit to disable the interrupt.
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* - Verify the non-stall interrupt disable register has the bit set for the unit.
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* - Clear the stall enable register.
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* - For negative testing, call nvgpu_mc_intr_stall_unit_config() with an
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* - For negative testing, call nvgpu_cic_intr_stall_unit_config() with an
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* invalid unit number, and verify no bits are set in the stall interrupt
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* enable register.
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* - Clear the stall enable register.
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* - For negative testing, call nvgpu_mc_intr_nonstall_unit_config() with an
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* - For negative testing, call nvgpu_cic_intr_nonstall_unit_config() with an
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* invalid unit number, and verify no bits are set in the non-stall interrupt
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* enable register.
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*
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@@ -118,9 +118,9 @@ int test_unit_config(struct unit_module *m, struct gk20a *g, void *args);
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*
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* Test Type: Feature
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*
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* Targets: nvgpu_mc_intr_stall_pause, nvgpu_mc_intr_stall_resume,
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* nvgpu_mc_intr_nonstall_pause, nvgpu_mc_intr_nonstall_resume,
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* nvgpu_mc_intr_mask, mc_gp10b_intr_stall_pause,
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* Targets: nvgpu_cic_intr_stall_pause, nvgpu_cic_intr_stall_resume,
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* nvgpu_cic_intr_nonstall_pause, nvgpu_cic_intr_nonstall_resume,
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* nvgpu_cic_intr_mask, mc_gp10b_intr_stall_pause,
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* mc_gp10b_intr_stall_resume, mc_gp10b_intr_nonstall_pause,
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* mc_gp10b_intr_nonstall_resume, mc_gp10b_intr_mask
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*
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@@ -336,7 +336,7 @@ int test_reset_mask(struct unit_module *m, struct gk20a *g, void *args);
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*
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* Test Type: Feature
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*
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* Targets: nvgpu_wait_for_deferred_interrupts
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* Targets: nvgpu_cic_wait_for_deferred_interrupts
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*
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* Input: test_mc_setup_env must have been run.
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*
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