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gpu: nvgpu: remove nvgpu_falcon_to_gk20a

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Remove the API nvgpu_falcon_to_gk20a as that is not needed as we can
pass gk20a struct parameter to emem copy functions directly.

JIRA NVGPU-1993

Change-Id: I2283900268342f9d9b8b5a62024f183624adf79f
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2023080
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Sagar Kamble
2019-03-13 10:31:15 +05:30
committed by mobile promotions
parent 7a365bc3b4
commit 9f68fecb64
6 changed files with 16 additions and 22 deletions
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17
drivers/gpu/nvgpu/common/falcon/falcon.c
View File

@@ -242,17 +242,19 @@ int nvgpu_falcon_copy_from_emem(struct nvgpu_falcon *flcn,
{
struct nvgpu_falcon_engine_dependency_ops *flcn_dops;
int status = -EINVAL;
struct gk20a *g;
if (flcn == NULL) {
return -EINVAL;
}
g = flcn->g;
flcn_dops = &flcn->flcn_engine_dep_ops;
if (flcn_dops->copy_from_emem != NULL) {
status = flcn_dops->copy_from_emem(flcn, src, dst, size, port);
status = flcn_dops->copy_from_emem(g, src, dst, size, port);
} else {
nvgpu_warn(flcn->g, "Invalid op on falcon 0x%x ",
nvgpu_warn(g, "Invalid op on falcon 0x%x ",
flcn->flcn_id);
}
@@ -264,17 +266,19 @@ int nvgpu_falcon_copy_to_emem(struct nvgpu_falcon *flcn,
{
struct nvgpu_falcon_engine_dependency_ops *flcn_dops;
int status = -EINVAL;
struct gk20a *g;
if (flcn == NULL) {
return -EINVAL;
}
g = flcn->g;
flcn_dops = &flcn->flcn_engine_dep_ops;
if (flcn_dops->copy_to_emem != NULL) {
status = flcn_dops->copy_to_emem(flcn, dst, src, size, port);
status = flcn_dops->copy_to_emem(g, dst, src, size, port);
} else {
nvgpu_warn(flcn->g, "Invalid op on falcon 0x%x ",
nvgpu_warn(g, "Invalid op on falcon 0x%x ",
flcn->flcn_id);
}
@@ -707,11 +711,6 @@ int nvgpu_falcon_get_mem_size(struct nvgpu_falcon *flcn,
return err;
}
struct gk20a *nvgpu_falcon_to_gk20a(struct nvgpu_falcon *flcn)
{
return flcn->g;
}
u32 nvgpu_falcon_get_id(struct nvgpu_falcon *flcn)
{
return flcn->flcn_id;

4
drivers/gpu/nvgpu/common/falcon/falcon_priv.h
View File

@@ -68,9 +68,9 @@ struct nvgpu_falcon_bl_info;
/* ops which are falcon engine specific */
struct nvgpu_falcon_engine_dependency_ops {
int (*reset_eng)(struct gk20a *g);
int (*copy_from_emem)(struct nvgpu_falcon *flcn, u32 src, u8 *dst,
int (*copy_from_emem)(struct gk20a *g, u32 src, u8 *dst,
u32 size, u8 port);
int (*copy_to_emem)(struct nvgpu_falcon *flcn, u32 dst, u8 *src,
int (*copy_to_emem)(struct gk20a *g, u32 dst, u8 *src,
u32 size, u8 port);
};

1
drivers/gpu/nvgpu/include/nvgpu/falcon.h
View File

@@ -124,7 +124,6 @@ int nvgpu_falcon_bl_bootstrap(struct nvgpu_falcon *flcn,
void nvgpu_falcon_get_ctls(struct nvgpu_falcon *flcn, u32 *sctl, u32 *cpuctl);
int nvgpu_falcon_get_mem_size(struct nvgpu_falcon *flcn,
enum falcon_mem_type type, u32 *size);
struct gk20a *nvgpu_falcon_to_gk20a(struct nvgpu_falcon *flcn);
u32 nvgpu_falcon_get_id(struct nvgpu_falcon *flcn);
int nvgpu_falcon_sw_init(struct gk20a *g, u32 flcn_id);

4
drivers/gpu/nvgpu/include/nvgpu/gk20a.h
View File

@@ -1628,9 +1628,9 @@ struct gpu_ops {
u32 *tail, bool set);
u32 (*falcon_base_addr)(void);
int (*sec2_reset)(struct gk20a *g);
int (*sec2_copy_to_emem)(struct nvgpu_falcon *flcn, u32 dst,
int (*sec2_copy_to_emem)(struct gk20a *g, u32 dst,
u8 *src, u32 size, u8 port);
int (*sec2_copy_from_emem)(struct nvgpu_falcon *flcn,
int (*sec2_copy_from_emem)(struct gk20a *g,
u32 src, u8 *dst, u32 size, u8 port);
int (*sec2_queue_head)(struct gk20a *g,
u32 queue_id, u32 queue_index,

8
drivers/gpu/nvgpu/tu104/sec2_tu104.c
View File

@@ -160,19 +160,15 @@ exit:
return status;
}
int tu104_sec2_flcn_copy_to_emem(struct nvgpu_falcon *flcn,
int tu104_sec2_flcn_copy_to_emem(struct gk20a *g,
u32 dst, u8 *src, u32 size, u8 port)
{
struct gk20a *g = nvgpu_falcon_to_gk20a(flcn);
return tu104_sec2_emem_transfer(g, dst, src, size, port, false);
}
int tu104_sec2_flcn_copy_from_emem(struct nvgpu_falcon *flcn,
int tu104_sec2_flcn_copy_from_emem(struct gk20a *g,
u32 src, u8 *dst, u32 size, u8 port)
{
struct gk20a *g = nvgpu_falcon_to_gk20a(flcn);
return tu104_sec2_emem_transfer(g, src, dst, size, port, true);
}

4
drivers/gpu/nvgpu/tu104/sec2_tu104.h
View File

@@ -26,9 +26,9 @@
struct nvgpu_sec2;
int tu104_sec2_reset(struct gk20a *g);
int tu104_sec2_flcn_copy_to_emem(struct nvgpu_falcon *flcn,
int tu104_sec2_flcn_copy_to_emem(struct gk20a *g,
u32 dst, u8 *src, u32 size, u8 port);
int tu104_sec2_flcn_copy_from_emem(struct nvgpu_falcon *flcn,
int tu104_sec2_flcn_copy_from_emem(struct gk20a *g,
u32 src, u8 *dst, u32 size, u8 port);
int tu104_sec2_setup_hw_and_bl_bootstrap(struct gk20a *g,
struct nvgpu_falcon_bl_info *bl_info);