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33
userspace/units/fifo/engine/Makefile Normal file
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# Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved.
#
# Permission is hereby granted, free of charge, to any person obtaining a
# copy of this software and associated documentation files (the "Software"),
# to deal in the Software without restriction, including without limitation
# the rights to use, copy, modify, merge, publish, distribute, sublicense,
# and/or sell copies of the Software, and to permit persons to whom the
# Software is furnished to do so, subject to the following conditions:
#
# The above copyright notice and this permission notice shall be included in
# all copies or substantial portions of the Software.
#
# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
# THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
# FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
# DEALINGS IN THE SOFTWARE.
.SUFFIXES:
OBJS = nvgpu-engine.o nvgpu-engine-status.o
MODULE = nvgpu-engine
LIB_PATHS += -lnvgpu-fifo-common
include ../../Makefile.units
lib$(MODULE).so: fifo
fifo:
$(MAKE) -C ..

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userspace/units/fifo/engine/Makefile.interface.tmk Normal file
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################################### tell Emacs this is a -*- makefile-gmake -*-
#
# Copyright (c) 2018-2019, NVIDIA CORPORATION. All rights reserved.
#
# Permission is hereby granted, free of charge, to any person obtaining a
# copy of this software and associated documentation files (the "Software"),
# to deal in the Software without restriction, including without limitation
# the rights to use, copy, modify, merge, publish, distribute, sublicense,
# and/or sell copies of the Software, and to permit persons to whom the
# Software is furnished to do so, subject to the following conditions:
#
# The above copyright notice and this permission notice shall be included in
# all copies or substantial portions of the Software.
#
# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
# THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
# FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
# DEALINGS IN THE SOFTWARE.
#
# tmake for SW Mobile component makefile
#
###############################################################################
NVGPU_UNIT_NAME=nvgpu-engine
include $(NV_COMPONENT_DIR)/../../Makefile.units.common.interface.tmk
# Local Variables:
# indent-tabs-mode: t
# tab-width: 8
# End:
# vi: set tabstop=8 noexpandtab:

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userspace/units/fifo/engine/Makefile.tmk Normal file
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################################### tell Emacs this is a -*- makefile-gmake -*-
#
# Copyright (c) 2019-2020, NVIDIA CORPORATION. All rights reserved.
#
# Permission is hereby granted, free of charge, to any person obtaining a
# copy of this software and associated documentation files (the "Software"),
# to deal in the Software without restriction, including without limitation
# the rights to use, copy, modify, merge, publish, distribute, sublicense,
# and/or sell copies of the Software, and to permit persons to whom the
# Software is furnished to do so, subject to the following conditions:
#
# The above copyright notice and this permission notice shall be included in
# all copies or substantial portions of the Software.
#
# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
# THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
# FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
# DEALINGS IN THE SOFTWARE.
#
# tmake for SW Mobile component makefile
#
###############################################################################
NVGPU_UNIT_NAME = nvgpu-engine
NVGPU_UNIT_SRCS = nvgpu-engine.c nvgpu-engine-status.c
NVGPU_UNIT_INTERFACE_DIRS := \
$(NV_COMPONENT_DIR)/..
include $(NV_COMPONENT_DIR)/../../Makefile.units.common.tmk
# Local Variables:
# indent-tabs-mode: t
# tab-width: 8
# End:
# vi: set tabstop=8 noexpandtab:

32
userspace/units/fifo/engine/gm20b/Makefile Normal file
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# Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved.
#
# Permission is hereby granted, free of charge, to any person obtaining a
# copy of this software and associated documentation files (the "Software"),
# to deal in the Software without restriction, including without limitation
# the rights to use, copy, modify, merge, publish, distribute, sublicense,
# and/or sell copies of the Software, and to permit persons to whom the
# Software is furnished to do so, subject to the following conditions:
#
# The above copyright notice and this permission notice shall be included in
# all copies or substantial portions of the Software.
#
# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
# THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
# FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
# DEALINGS IN THE SOFTWARE.
.SUFFIXES:
OBJS = nvgpu-engine-gm20b.o
MODULE = nvgpu-engine-gm20b
LIB_PATHS += -lnvgpu-fifo-common
include ../../../Makefile.units
lib$(MODULE).so: fifo
fifo:
$(MAKE) -C ../..

35
userspace/units/fifo/engine/gm20b/Makefile.interface.tmk Normal file
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################################### tell Emacs this is a -*- makefile-gmake -*-
#
# Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved.
#
# Permission is hereby granted, free of charge, to any person obtaining a
# copy of this software and associated documentation files (the "Software"),
# to deal in the Software without restriction, including without limitation
# the rights to use, copy, modify, merge, publish, distribute, sublicense,
# and/or sell copies of the Software, and to permit persons to whom the
# Software is furnished to do so, subject to the following conditions:
#
# The above copyright notice and this permission notice shall be included in
# all copies or substantial portions of the Software.
#
# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
# THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
# FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
# DEALINGS IN THE SOFTWARE.
#
# tmake for SW Mobile component makefile
#
###############################################################################
NVGPU_UNIT_NAME=nvgpu-engine-gm20b
include $(NV_SOURCE)/kernel/nvgpu/userspace/units/Makefile.units.common.interface.tmk
# Local Variables:
# indent-tabs-mode: t
# tab-width: 8
# End:
# vi: set tabstop=8 noexpandtab:

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userspace/units/fifo/engine/gm20b/Makefile.tmk Normal file
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################################### tell Emacs this is a -*- makefile-gmake -*-
#
# Copyright (c) 2019-2020, NVIDIA CORPORATION. All rights reserved.
#
# Permission is hereby granted, free of charge, to any person obtaining a
# copy of this software and associated documentation files (the "Software"),
# to deal in the Software without restriction, including without limitation
# the rights to use, copy, modify, merge, publish, distribute, sublicense,
# and/or sell copies of the Software, and to permit persons to whom the
# Software is furnished to do so, subject to the following conditions:
#
# The above copyright notice and this permission notice shall be included in
# all copies or substantial portions of the Software.
#
# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
# THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
# FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
# DEALINGS IN THE SOFTWARE.
#
# tmake for SW Mobile component makefile
#
###############################################################################
NVGPU_UNIT_NAME = nvgpu-engine-gm20b
NVGPU_UNIT_SRCS = nvgpu-engine-gm20b.c
NVGPU_UNIT_INTERFACE_DIRS := \
$(NV_SOURCE)/kernel/nvgpu/userspace/units/fifo
include $(NV_SOURCE)/kernel/nvgpu/userspace/units/Makefile.units.common.tmk
# Local Variables:
# indent-tabs-mode: t
# tab-width: 8
# End:
# vi: set tabstop=8 noexpandtab:

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userspace/units/fifo/engine/gm20b/nvgpu-engine-gm20b.c Normal file
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/*
* Copyright (c) 2019-2020, NVIDIA CORPORATION. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
* DEALINGS IN THE SOFTWARE.
*/
#include <stdlib.h>
#include <sys/types.h>
#include <unistd.h>
#include <unit/io.h>
#include <unit/unit.h>
#include <nvgpu/gk20a.h>
#include <nvgpu/io.h>
#include <nvgpu/device.h>
#include <nvgpu/engines.h>
#include <nvgpu/engine_status.h>
#include "hal/fifo/engine_status_gm20b.h"
#include <nvgpu/hw/gm20b/hw_fifo_gm20b.h>
#include <nvgpu/hw/gm20b/hw_top_gm20b.h>
#include "../../nvgpu-fifo-common.h"
#include "nvgpu-engine-gm20b.h"
#ifdef ENGINE_GM20B_UNIT_DEBUG
#undef unit_verbose
#define unit_verbose unit_info
#else
#define unit_verbose(unit, msg, ...) \
do { \
if (0) { \
unit_info(unit, msg, ##__VA_ARGS__); \
} \
} while (0)
#endif
#define branches_str test_fifo_flags_str
#define pruned test_fifo_subtest_pruned
#define F_ENGINE_READ_STATUS_BUSY BIT(0)
#define F_ENGINE_READ_STATUS_FAULTED BIT(1)
#define F_ENGINE_READ_STATUS_ID_TSG BIT(2)
#define F_ENGINE_READ_STATUS_ID_NEXT_TSG BIT(3)
#define F_ENGINE_READ_STATUS_LAST BIT(4)
#define NUM_STATES 5
int test_gm20b_read_engine_status_info(struct unit_module *m,
struct gk20a *g, void *args)
{
int ret = UNIT_FAIL;
struct nvgpu_engine_status_info expected;
struct nvgpu_engine_status_info status;
struct nvgpu_fifo *f = &g->fifo;
u32 engine_id = 0;
u32 ctx_id, ctx_id_type;
u32 ctx_next_id, ctx_next_id_type;
u32 branches = 0;
u32 data;
u32 ctxsw_status;
const char *labels[] = {
"busy",
"faulted",
"id_tsg",
"id_next_tsg",
"ctx_valid",
"ctx_load",
"ctx_save",
"ctx_switch",
};
char *ctxsw_status_label = NULL;
unit_assert(f->num_engines > 0, goto done);
nvgpu_writel(g, fifo_engine_status_r(engine_id), 0xbeef);
gm20b_read_engine_status_info(g, NVGPU_INVALID_ENG_ID, &status);
unit_assert(status.reg_data == 0, goto done);
for (branches = 0; branches < F_ENGINE_READ_STATUS_LAST; branches++) {
memset(&expected, 0, sizeof(expected));
memset(&status, 0, sizeof(status));
data = 0U;
if (branches & F_ENGINE_READ_STATUS_ID_TSG) {
ctx_id = 1;
ctx_id_type = ENGINE_STATUS_CTX_ID_TYPE_TSGID;
data |= (fifo_engine_status_id_type_tsgid_v() << 12);
} else {
ctx_id = 101;
ctx_id_type = ENGINE_STATUS_CTX_ID_TYPE_CHID;
data |= (fifo_engine_status_id_type_chid_v() << 12);
}
data |= (ctx_id << 0);
if (branches & F_ENGINE_READ_STATUS_ID_NEXT_TSG) {
ctx_next_id = 2;
ctx_next_id_type = ENGINE_STATUS_CTX_NEXT_ID_TYPE_TSGID;
data |= (fifo_engine_status_next_id_type_tsgid_v() << 28);
} else {
ctx_next_id = 102;
ctx_next_id_type = ENGINE_STATUS_CTX_NEXT_ID_TYPE_CHID;
data |= (fifo_engine_status_next_id_type_chid_v() << 28);
}
data |= (ctx_next_id << 16);
if (branches & F_ENGINE_READ_STATUS_BUSY) {
data |= BIT(31);
expected.is_busy = true;
}
if (branches & F_ENGINE_READ_STATUS_FAULTED) {
data |= BIT(30);
expected.is_faulted = true;
}
for (ctxsw_status = NVGPU_CTX_STATUS_INVALID;
ctxsw_status <= NVGPU_CTX_STATUS_CTXSW_SWITCH;
ctxsw_status++) {
expected.ctx_id = ENGINE_STATUS_CTX_ID_INVALID;
expected.ctx_id_type = ENGINE_STATUS_CTX_ID_TYPE_INVALID;
expected.ctx_next_id = ENGINE_STATUS_CTX_NEXT_ID_INVALID;
expected.ctx_next_id_type = ENGINE_STATUS_CTX_NEXT_ID_TYPE_INVALID;
data = data & ~(0x7 << 13);
switch (ctxsw_status) {
case NVGPU_CTX_STATUS_VALID:
data |= (fifo_engine_status_ctx_status_valid_v() << 13);
expected.ctx_id = ctx_id;
expected.ctx_id_type = ctx_id_type;
expected.ctxsw_status = NVGPU_CTX_STATUS_VALID;
ctxsw_status_label = "valid";
break;
case NVGPU_CTX_STATUS_CTXSW_LOAD:
data |= (fifo_engine_status_ctx_status_ctxsw_load_v() << 13);
expected.ctx_next_id = ctx_next_id;
expected.ctx_next_id_type = ctx_next_id_type;
expected.ctxsw_status = NVGPU_CTX_STATUS_CTXSW_LOAD;
ctxsw_status_label = "load";
break;
case NVGPU_CTX_STATUS_CTXSW_SAVE:
data |= (fifo_engine_status_ctx_status_ctxsw_save_v() << 13);
expected.ctx_id = ctx_id;
expected.ctx_id_type = ctx_id_type;
expected.ctxsw_status = NVGPU_CTX_STATUS_CTXSW_SAVE;
ctxsw_status_label = "save";
break;
case NVGPU_CTX_STATUS_CTXSW_SWITCH:
data |= (fifo_engine_status_ctx_status_ctxsw_switch_v() << 13);
expected.ctx_id = ctx_id;
expected.ctx_id_type = ctx_id_type;
expected.ctx_next_id = ctx_next_id;
expected.ctx_next_id_type = ctx_next_id_type;
expected.ctxsw_status = NVGPU_CTX_STATUS_CTXSW_SWITCH;
ctxsw_status_label = "switch";
break;
default:
case NVGPU_CTX_STATUS_INVALID:
expected.ctxsw_status = NVGPU_CTX_STATUS_INVALID;
ctxsw_status_label = "invalid";
break;
}
if (data & fifo_engine_status_ctxsw_in_progress_f()) {
expected.ctxsw_in_progress = true;
}
unit_verbose(m, "%s branches=%s %s\n", __func__,
branches_str(branches, labels), ctxsw_status_label);
nvgpu_writel(g, fifo_engine_status_r(engine_id), data);
gm20b_read_engine_status_info(g, engine_id, &status);
unit_assert(status.is_busy == expected.is_busy,
goto done);
unit_assert(status.is_faulted == expected.is_faulted,
goto done);
unit_assert(status.ctxsw_in_progress ==
expected.ctxsw_in_progress, goto done);
unit_assert(status.ctxsw_status ==
expected.ctxsw_status, goto done);
unit_assert(status.ctx_id ==
expected.ctx_id, goto done);
unit_assert(status.ctx_id_type ==
expected.ctx_id_type, goto done);
unit_assert(status.ctx_next_id ==
expected.ctx_next_id, goto done);
unit_assert(status.ctx_next_id_type ==
expected.ctx_next_id_type, goto done);
}
}
ret = UNIT_SUCCESS;
done:
if (ret != UNIT_SUCCESS) {
unit_err(m, "%s branches=%s\n", __func__,
branches_str(branches, labels));
}
return ret;
}
struct unit_module_test nvgpu_engine_gm20b_tests[] = {
UNIT_TEST(init_support, test_fifo_init_support, NULL, 0),
UNIT_TEST(read_engine_status_info, test_gm20b_read_engine_status_info, NULL, 0),
UNIT_TEST(remove_support, test_fifo_remove_support, NULL, 0),
};
UNIT_MODULE(nvgpu_engine_gm20b, nvgpu_engine_gm20b_tests, UNIT_PRIO_NVGPU_TEST);

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/*
* Copyright (c) 2019-2020, NVIDIA CORPORATION. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
* DEALINGS IN THE SOFTWARE.
*/
#ifndef UNIT_NVGPU_ENGINE_GM20B_H
#define UNIT_NVGPU_ENGINE_GM20B_H
#include <nvgpu/types.h>
struct unit_module;
struct gk20a;
/** @addtogroup SWUTS-fifo-engine-gm20b
* @{
*
* Software Unit Test Specification for fifo/engine/gm20b
*/
/**
* Test specification for: test_gm20b_read_engine_status_info
*
* Description: Branch coverage for gm20b_read_engine_status_info
*
* Test Type: Feature
*
* Targets: gops_engine_status.read_engine_status_info,
* gm20b_read_engine_status_info
*
* Input: test_fifo_init_support has run.
*
* Steps:
* - Set fifo_engine_status_r with combinations of H/W status:
* - engine is busy/idle
* - engine faulted/non-faulted
* - ctxsw status (valid, invalid, load, save, switch)
* - Check that nvgpu_engine_status_info is consistent with H/W status.
*
* Output: Returns PASS if all branches gave expected results. FAIL otherwise.
*/
int test_gm20b_read_engine_status_info(struct unit_module *m,
struct gk20a *g, void *args);
/**
* @}
*/
#endif /* UNIT_NVGPU_ENGINE_GM20B_H */

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userspace/units/fifo/engine/gp10b/Makefile Normal file
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# Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved.
#
# Permission is hereby granted, free of charge, to any person obtaining a
# copy of this software and associated documentation files (the "Software"),
# to deal in the Software without restriction, including without limitation
# the rights to use, copy, modify, merge, publish, distribute, sublicense,
# and/or sell copies of the Software, and to permit persons to whom the
# Software is furnished to do so, subject to the following conditions:
#
# The above copyright notice and this permission notice shall be included in
# all copies or substantial portions of the Software.
#
# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
# THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
# FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
# DEALINGS IN THE SOFTWARE.
.SUFFIXES:
OBJS = nvgpu-engine-gp10b.o
MODULE = nvgpu-engine-gp10b
LIB_PATHS += -lnvgpu-fifo-common
include ../../../Makefile.units
lib$(MODULE).so: fifo
fifo:
$(MAKE) -C ../..

35
userspace/units/fifo/engine/gp10b/Makefile.interface.tmk Normal file
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################################### tell Emacs this is a -*- makefile-gmake -*-
#
# Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved.
#
# Permission is hereby granted, free of charge, to any person obtaining a
# copy of this software and associated documentation files (the "Software"),
# to deal in the Software without restriction, including without limitation
# the rights to use, copy, modify, merge, publish, distribute, sublicense,
# and/or sell copies of the Software, and to permit persons to whom the
# Software is furnished to do so, subject to the following conditions:
#
# The above copyright notice and this permission notice shall be included in
# all copies or substantial portions of the Software.
#
# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
# THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
# FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
# DEALINGS IN THE SOFTWARE.
#
# tmake for SW Mobile component makefile
#
###############################################################################
NVGPU_UNIT_NAME=nvgpu-engine-gp10b
include $(NV_SOURCE)/kernel/nvgpu/userspace/units/Makefile.units.common.interface.tmk
# Local Variables:
# indent-tabs-mode: t
# tab-width: 8
# End:
# vi: set tabstop=8 noexpandtab:

39
userspace/units/fifo/engine/gp10b/Makefile.tmk Normal file
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################################### tell Emacs this is a -*- makefile-gmake -*-
#
# Copyright (c) 2019-2020, NVIDIA CORPORATION. All rights reserved.
#
# Permission is hereby granted, free of charge, to any person obtaining a
# copy of this software and associated documentation files (the "Software"),
# to deal in the Software without restriction, including without limitation
# the rights to use, copy, modify, merge, publish, distribute, sublicense,
# and/or sell copies of the Software, and to permit persons to whom the
# Software is furnished to do so, subject to the following conditions:
#
# The above copyright notice and this permission notice shall be included in
# all copies or substantial portions of the Software.
#
# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
# THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
# FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
# DEALINGS IN THE SOFTWARE.
#
# tmake for SW Mobile component makefile
#
###############################################################################
NVGPU_UNIT_NAME = nvgpu-engine-gp10b
NVGPU_UNIT_SRCS = nvgpu-engine-gp10b.c
NVGPU_UNIT_INTERFACE_DIRS := \
$(NV_SOURCE)/kernel/nvgpu/userspace/units/fifo
include $(NV_SOURCE)/kernel/nvgpu/userspace/units/Makefile.units.common.tmk
# Local Variables:
# indent-tabs-mode: t
# tab-width: 8
# End:
# vi: set tabstop=8 noexpandtab:

45
userspace/units/fifo/engine/gp10b/nvgpu-engine-gp10b.c Normal file
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/*
* Copyright (c) 2019-2020, NVIDIA CORPORATION. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
* DEALINGS IN THE SOFTWARE.
*/
#include <stdlib.h>
#include <sys/types.h>
#include <unistd.h>
#include <unit/io.h>
#include <unit/unit.h>
#include "nvgpu-engine-gp10b.h"
#include "../../nvgpu-fifo-common.h"
int test_gp10b_engine_init_ce_info(struct unit_module *m,
struct gk20a *g, void *args)
{
return UNIT_FAIL;
}
struct unit_module_test nvgpu_engine_gp10b_tests[] = {
UNIT_TEST(init_support, test_fifo_init_support, NULL, 0),
UNIT_TEST(engine_init_ce_info, test_gp10b_engine_init_ce_info, NULL, 2),
UNIT_TEST(remove_support, test_fifo_remove_support, NULL, 0),
};
UNIT_MODULE(nvgpu_engine_gp10b, nvgpu_engine_gp10b_tests, UNIT_PRIO_NVGPU_TEST);

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/*
* Copyright (c) 2019-2020, NVIDIA CORPORATION. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
* DEALINGS IN THE SOFTWARE.
*/
#ifndef UNIT_NVGPU_ENGINE_GP10B_H
#define UNIT_NVGPU_ENGINE_GP10B_H
#include <nvgpu/types.h>
struct unit_module;
struct gk20a;
/** @addtogroup SWUTS-fifo-engine-gp10b
* @{
*
* Software Unit Test Specification for fifo/engine/gp10b
*/
/**
* Test specification for: test_gp10b_engine_init_ce_info
*
* Description: Branch coverage for gp10b_engine_init_ce_info
*
* Test Type: Feature
*
* Targets: gp10b_engine_init_ce_info
*
* Input: test_fifo_init_support has run..
*
* Steps:
* - Check valid cases for gp10b_engine_init_ce_info:
* - Check GRCE case (runlist shared with GR engine).
* - Check fault_id adjustment for GRCE (0 -> 0x1b).
* - Check ASYCNC CE case (runlist NOT shared with GR engine).
* In valid cases, check that function returns 0 and that expected number
* of CE engines has been added.
*
* - Use stubs to check failure cases for gp10b_engine_init_ce_info:
* - g->ops.top.get_num_engine_type_entries is NULL.
* - g->ops.top.get_num_engine_type_entries returns 0.
* - Failure to get device info with g->ops.top.get_device_info.
* - Failure to find PBDMA servicing engine runlist (i.e. failure of
* g->ops.pbdma.find_for_runlist).
* In all failure cases, check that error code is returned.
*
* Output: Returns PASS if all branches gave expected results. FAIL otherwise.
*/
int test_gp10b_engine_init_ce_info(struct unit_module *m,
struct gk20a *g, void *args);
/**
* @}
*/
#endif /* UNIT_NVGPU_ENGINE_GP10B_H */

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# Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved.
#
# Permission is hereby granted, free of charge, to any person obtaining a
# copy of this software and associated documentation files (the "Software"),
# to deal in the Software without restriction, including without limitation
# the rights to use, copy, modify, merge, publish, distribute, sublicense,
# and/or sell copies of the Software, and to permit persons to whom the
# Software is furnished to do so, subject to the following conditions:
#
# The above copyright notice and this permission notice shall be included in
# all copies or substantial portions of the Software.
#
# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
# THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
# FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
# DEALINGS IN THE SOFTWARE.
.SUFFIXES:
OBJS = nvgpu-engine-gv100.o
MODULE = nvgpu-engine-gv100
LIB_PATHS += -lnvgpu-fifo-common
include ../../../Makefile.units
lib$(MODULE).so: fifo
fifo:
$(MAKE) -C ../..

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################################### tell Emacs this is a -*- makefile-gmake -*-
#
# Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved.
#
# Permission is hereby granted, free of charge, to any person obtaining a
# copy of this software and associated documentation files (the "Software"),
# to deal in the Software without restriction, including without limitation
# the rights to use, copy, modify, merge, publish, distribute, sublicense,
# and/or sell copies of the Software, and to permit persons to whom the
# Software is furnished to do so, subject to the following conditions:
#
# The above copyright notice and this permission notice shall be included in
# all copies or substantial portions of the Software.
#
# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
# THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
# FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
# DEALINGS IN THE SOFTWARE.
#
# tmake for SW Mobile component makefile
#
###############################################################################
NVGPU_UNIT_NAME=nvgpu-engine-gv100
include $(NV_SOURCE)/kernel/nvgpu/userspace/units/Makefile.units.common.interface.tmk
# Local Variables:
# indent-tabs-mode: t
# tab-width: 8
# End:
# vi: set tabstop=8 noexpandtab:

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################################### tell Emacs this is a -*- makefile-gmake -*-
#
# Copyright (c) 2019-2020, NVIDIA CORPORATION. All rights reserved.
#
# Permission is hereby granted, free of charge, to any person obtaining a
# copy of this software and associated documentation files (the "Software"),
# to deal in the Software without restriction, including without limitation
# the rights to use, copy, modify, merge, publish, distribute, sublicense,
# and/or sell copies of the Software, and to permit persons to whom the
# Software is furnished to do so, subject to the following conditions:
#
# The above copyright notice and this permission notice shall be included in
# all copies or substantial portions of the Software.
#
# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
# THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
# FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
# DEALINGS IN THE SOFTWARE.
#
# tmake for SW Mobile component makefile
#
###############################################################################
NVGPU_UNIT_NAME = nvgpu-engine-gv100
NVGPU_UNIT_SRCS = nvgpu-engine-gv100.c
NVGPU_UNIT_INTERFACE_DIRS := \
$(NV_SOURCE)/kernel/nvgpu/userspace/units/fifo
include $(NV_SOURCE)/kernel/nvgpu/userspace/units/Makefile.units.common.tmk
# Local Variables:
# indent-tabs-mode: t
# tab-width: 8
# End:
# vi: set tabstop=8 noexpandtab:

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/*
* Copyright (c) 2019-2020, NVIDIA CORPORATION. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
* DEALINGS IN THE SOFTWARE.
*/
#include <stdlib.h>
#include <sys/types.h>
#include <unistd.h>
#include <unit/io.h>
#include <unit/unit.h>
#include <nvgpu/gk20a.h>
#include <nvgpu/io.h>
#include <nvgpu/engines.h>
#include <nvgpu/engine_status.h>
#include <nvgpu/posix/posix-fault-injection.h>
#include "hal/fifo/engine_status_gv100.h"
#include <nvgpu/hw/gv100/hw_fifo_gv100.h>
#include "../../nvgpu-fifo-common.h"
#include "nvgpu-engine-gv100.h"
//#define ENGINE_GV100_UNIT_DEBUG
#ifdef ENGINE_GV100_UNIT_DEBUG
#undef unit_verbose
#define unit_verbose unit_info
#else
#define unit_verbose(unit, msg, ...) \
do { \
if (0) { \
unit_info(unit, msg, ##__VA_ARGS__); \
} \
} while (0)
#endif
#define branches_str test_fifo_flags_str
#define pruned test_fifo_subtest_pruned
struct unit_ctx {
struct unit_module *m;
u32 engine_id;
};
struct unit_ctx unit_ctx;
int test_gv100_read_engine_status_info(struct unit_module *m,
struct gk20a *g, void *args)
{
struct gpu_ops gops = g->ops;
u32 engine_id = nvgpu_engine_get_gr_id(g);
struct nvgpu_engine_status_info status;
int ret = UNIT_FAIL;
/* gm20b_read_engine_status_info covered separately */
nvgpu_writel(g, fifo_engine_status_r(engine_id), 0);
gv100_read_engine_status_info(g, engine_id, &status);
unit_assert(status.in_reload_status == false, goto done);
nvgpu_writel(g, fifo_engine_status_r(engine_id), BIT(29));
gv100_read_engine_status_info(g, engine_id, &status);
unit_assert(status.in_reload_status == true, goto done);
ret = UNIT_SUCCESS;
done:
g->ops = gops;
return ret;
}
#define F_ENGINE_DUMP_CTX_IS_TSG BIT(0)
#define F_ENGINE_DUMP_NEXT_CTX_IS_TSG BIT(1)
#define F_ENGINE_DUMP_IN_RELOAD_STATUS BIT(2)
#define F_ENGINE_DUMP_IS_FAULTED BIT(3)
#define F_ENGINE_DUMP_IS_BUSY BIT(4)
#define F_ENGINE_DUMP_LAST BIT(5)
static u32 stub_get_litter_value(struct gk20a *g, int value)
{
/*
* Pretend there are as many engines as possible branches.
* Each engine_id will cover one combination of branches.
*/
return F_ENGINE_DUMP_LAST;
}
static u32 stub_get_litter_value_0(struct gk20a *g, int value)
{
return 0;
}
static void stub_read_engine_status_info(struct gk20a *g, u32 engine_id,
struct nvgpu_engine_status_info *status)
{
u32 branches = engine_id;
unit_verbose(unit_ctx.m, "engine_id=%u\n", engine_id);
memset(status, 0, sizeof(*status));
status->ctx_id_type = branches & F_ENGINE_DUMP_CTX_IS_TSG ?
ENGINE_STATUS_CTX_ID_TYPE_TSGID : ENGINE_STATUS_CTX_ID_TYPE_CHID;
status->ctx_next_id_type = branches & F_ENGINE_DUMP_NEXT_CTX_IS_TSG ?
ENGINE_STATUS_CTX_NEXT_ID_TYPE_TSGID : ENGINE_STATUS_CTX_NEXT_ID_TYPE_CHID;
status->in_reload_status = branches & F_ENGINE_DUMP_IN_RELOAD_STATUS ?
true : false;
status->is_faulted = branches & F_ENGINE_DUMP_IS_FAULTED ?
true : false;
status->is_busy = branches & F_ENGINE_DUMP_IS_BUSY ?
true : false;
unit_ctx.engine_id = engine_id;
}
int test_gv100_dump_engine_status(struct unit_module *m,
struct gk20a *g, void *args)
{
struct gpu_ops gops = g->ops;
struct nvgpu_debug_context o;
int ret = UNIT_FAIL;
u32 num_engines;
unit_ctx.m = m;
g->ops.get_litter_value = stub_get_litter_value;
num_engines = g->ops.get_litter_value(g, GPU_LIT_HOST_NUM_ENGINES);
unit_verbose(unit_ctx.m, "num_engines=%u\n", num_engines);
g->ops.engine_status.read_engine_status_info = stub_read_engine_status_info;
unit_ctx.engine_id = 0;
gv100_dump_engine_status(g, &o);
unit_assert(unit_ctx.engine_id == (num_engines - 1), goto done);
unit_ctx.engine_id = (u32)~0;
g->ops.get_litter_value = stub_get_litter_value_0;
gv100_dump_engine_status(g, &o);
unit_assert(unit_ctx.engine_id == (u32)~0, goto done);
ret = UNIT_SUCCESS;
done:
g->ops = gops;
return ret;
}
struct unit_module_test nvgpu_engine_gv100_tests[] = {
UNIT_TEST(init_support, test_fifo_init_support, NULL, 0),
UNIT_TEST(read_engine_status_info, test_gv100_read_engine_status_info, NULL, 0),
UNIT_TEST(dump_engine_status_info, test_gv100_dump_engine_status, NULL, 1),
UNIT_TEST(remove_support, test_fifo_remove_support, NULL, 0),
};
UNIT_MODULE(nvgpu_engine_gv100, nvgpu_engine_gv100_tests, UNIT_PRIO_NVGPU_TEST);

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/*
* Copyright (c) 2019-2020, NVIDIA CORPORATION. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
* DEALINGS IN THE SOFTWARE.
*/
#ifndef UNIT_NVGPU_ENGINE_GV100_H
#define UNIT_NVGPU_ENGINE_GV100_H
#include <nvgpu/types.h>
struct unit_module;
struct gk20a;
/** @addtogroup SWUTS-fifo-engine-gv100
* @{
*
* Software Unit Test Specification for fifo/engine/gv100
*/
/**
* Test specification for: test_gv100_read_engine_status_info
*
* Description: Branch coverage for gv100_read_engine_status_info
*
* Test Type: Feature
*
* Targets: gops_engine_status.read_engine_status_info,
* gv100_read_engine_status_info
*
* Input: test_fifo_init_support() run for this GPU
*
* Steps:
* - Check that status.in_reload_status field is consistent with
* fifo_engine_status_eng_reload_f bit of fifo_engine_status_r H/W register.
* - Other bits tested in a separate test for gm20b_read_engine_status_info.
*
* Output: Returns PASS if all branches gave expected results. FAIL otherwise.
*/
int test_gv100_read_engine_status_info(struct unit_module *m,
struct gk20a *g, void *args);
/**
* Test specification for: test_gv100_dump_engine_status
*
* Description: Branch coverage for gv100_dump_engine_status
*
* Test Type: Feature
*
* Targets: gops_engine_status.dump_engine_status, gv100_dump_engine_status
*
* Input: test_fifo_init_support() run for this GPU
*
* Steps:
* - Check dumping of engine status, with combinations of:
* - ctx_id_type is TSG/channel.
* - ctx_next_id_tupe is TSG/channel.
* - in_reload_status is true/false.
* - is_faulted is true/false.
* - is_busy is true/false.
* Check number that read_engine_status_info was (num_engines - 1) times.
*
* Output: Returns PASS if all branches gave expected results. FAIL otherwise.
*/
int test_gv100_dump_engine_status(struct unit_module *m,
struct gk20a *g, void *args);
/**
* @}
*/
#endif /* UNIT_NVGPU_ENGINE_GV100_H */

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# Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved.
#
# Permission is hereby granted, free of charge, to any person obtaining a
# copy of this software and associated documentation files (the "Software"),
# to deal in the Software without restriction, including without limitation
# the rights to use, copy, modify, merge, publish, distribute, sublicense,
# and/or sell copies of the Software, and to permit persons to whom the
# Software is furnished to do so, subject to the following conditions:
#
# The above copyright notice and this permission notice shall be included in
# all copies or substantial portions of the Software.
#
# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
# THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
# FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
# DEALINGS IN THE SOFTWARE.
.SUFFIXES:
OBJS = nvgpu-engine-gv11b.o
MODULE = nvgpu-engine-gv11b
LIB_PATHS += -lnvgpu-fifo-common
include ../../../Makefile.units
lib$(MODULE).so: fifo
fifo:
$(MAKE) -C ../..

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################################### tell Emacs this is a -*- makefile-gmake -*-
#
# Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved.
#
# Permission is hereby granted, free of charge, to any person obtaining a
# copy of this software and associated documentation files (the "Software"),
# to deal in the Software without restriction, including without limitation
# the rights to use, copy, modify, merge, publish, distribute, sublicense,
# and/or sell copies of the Software, and to permit persons to whom the
# Software is furnished to do so, subject to the following conditions:
#
# The above copyright notice and this permission notice shall be included in
# all copies or substantial portions of the Software.
#
# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
# THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
# FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
# DEALINGS IN THE SOFTWARE.
#
# tmake for SW Mobile component makefile
#
###############################################################################
NVGPU_UNIT_NAME=nvgpu-engine-gv11b
include $(NV_SOURCE)/kernel/nvgpu/userspace/units/Makefile.units.common.interface.tmk
# Local Variables:
# indent-tabs-mode: t
# tab-width: 8
# End:
# vi: set tabstop=8 noexpandtab:

39
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################################### tell Emacs this is a -*- makefile-gmake -*-
#
# Copyright (c) 2019-2020, NVIDIA CORPORATION. All rights reserved.
#
# Permission is hereby granted, free of charge, to any person obtaining a
# copy of this software and associated documentation files (the "Software"),
# to deal in the Software without restriction, including without limitation
# the rights to use, copy, modify, merge, publish, distribute, sublicense,
# and/or sell copies of the Software, and to permit persons to whom the
# Software is furnished to do so, subject to the following conditions:
#
# The above copyright notice and this permission notice shall be included in
# all copies or substantial portions of the Software.
#
# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
# THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
# FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
# DEALINGS IN THE SOFTWARE.
#
# tmake for SW Mobile component makefile
#
###############################################################################
NVGPU_UNIT_NAME = nvgpu-engine-gv11b
NVGPU_UNIT_SRCS = nvgpu-engine-gv11b.c
NVGPU_UNIT_INTERFACE_DIRS := \
$(NV_SOURCE)/kernel/nvgpu/userspace/units/fifo
include $(NV_SOURCE)/kernel/nvgpu/userspace/units/Makefile.units.common.tmk
# Local Variables:
# indent-tabs-mode: t
# tab-width: 8
# End:
# vi: set tabstop=8 noexpandtab:

75
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/*
* Copyright (c) 2019-2020, NVIDIA CORPORATION. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
* DEALINGS IN THE SOFTWARE.
*/
#include <stdlib.h>
#include <sys/types.h>
#include <unistd.h>
#include <unit/io.h>
#include <unit/unit.h>
#include <nvgpu/gk20a.h>
#include <nvgpu/io.h>
#include <nvgpu/engines.h>
#include <nvgpu/engine_status.h>
#include "hal/fifo/engines_gv11b.h"
#include <nvgpu/hw/gv11b/hw_fifo_gv11b.h>
#include <nvgpu/hw/gv11b/hw_gmmu_gv11b.h>
#include "../../nvgpu-fifo-common.h"
#include "nvgpu-engine-gv11b.h"
#ifdef ENGINE_GV11B_UNIT_DEBUG
#undef unit_verbose
#define unit_verbose unit_info
#else
#define unit_verbose(unit, msg, ...) \
do { \
if (0) { \
unit_info(unit, msg, ##__VA_ARGS__); \
} \
} while (0)
#endif
int test_gv11b_is_fault_engine_subid_gpc(struct unit_module *m,
struct gk20a *g, void *args)
{
int ret = UNIT_FAIL;
unit_assert(gv11b_is_fault_engine_subid_gpc(g,
gmmu_fault_client_type_gpc_v()) == true, goto done);
unit_assert(gv11b_is_fault_engine_subid_gpc(g,
gmmu_fault_client_type_hub_v()) == false, goto done);
ret = UNIT_SUCCESS;
done:
return ret;
}
struct unit_module_test nvgpu_engine_gv11b_tests[] = {
UNIT_TEST(is_fault_engine_subid_gpc, test_gv11b_is_fault_engine_subid_gpc, NULL, 0),
};
UNIT_MODULE(nvgpu_engine_gv11b, nvgpu_engine_gv11b_tests, UNIT_PRIO_NVGPU_TEST);

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/*
* Copyright (c) 2019-2020, NVIDIA CORPORATION. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
* DEALINGS IN THE SOFTWARE.
*/
#ifndef UNIT_NVGPU_ENGINE_GV11B_H
#define UNIT_NVGPU_ENGINE_GV11B_H
#include <nvgpu/types.h>
struct unit_module;
struct gk20a;
/** @addtogroup SWUTS-fifo-engine-gv11b
* @{
*
* Software Unit Test Specification for fifo/engine/gv11b
*/
/**
* Test specification for: test_gv11b_is_fault_engine_subid_gpc
*
* Description: Branch coverage for gv11b_is_fault_engine_subid_gpc
*
* Test Type: Feature
*
* Targets: gops_engine.is_fault_engine_subid_gpc,
* gv11b_is_fault_engine_subid_gpc
*
* Input: test_fifo_init_support() run for this GPU
*
* Steps:
* - Check that true is returned for GPC engine subid
* (i.e. gmmu_fault_client_type_gpc_v).
* - Check that false is returned for non-GPC engine subid
* (i.e. gmmu_fault_client_type_hub_v).
*
* Output: Returns PASS if all branches gave expected results. FAIL otherwise.
*/
int test_gv11b_is_fault_engine_subid_gpc(struct unit_module *m,
struct gk20a *g, void *args);
/**
* @}
*/
#endif /* UNIT_NVGPU_ENGINE_GV11B_H */

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/*
* Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
* DEALINGS IN THE SOFTWARE.
*/
#include <stdlib.h>
#include <sys/types.h>
#include <unistd.h>
#include <unit/io.h>
#include <unit/unit.h>
#include <nvgpu/types.h>
#include <nvgpu/engine_status.h>
#include "../nvgpu-fifo-common.h"
#include "nvgpu-engine-status.h"
#define assert(cond) unit_assert(cond, goto done)
#define NUM_CTXSW_STATUS 6
#define NUM_ID_TYPES 3
#define NUM_NEXT_ID_TYPES 3
int test_engine_status(struct unit_module *m,
struct gk20a *g, void *args)
{
int ret = UNIT_FAIL;
struct nvgpu_engine_status_info status;
const u32 ctxsw_status[NUM_CTXSW_STATUS] = {
NVGPU_CTX_STATUS_INVALID,
NVGPU_CTX_STATUS_VALID,
NVGPU_CTX_STATUS_CTXSW_LOAD,
NVGPU_CTX_STATUS_CTXSW_SAVE,
NVGPU_CTX_STATUS_CTXSW_SWITCH,
U32(~0),
};
const u32 id_types[NUM_ID_TYPES] = {
ENGINE_STATUS_CTX_ID_TYPE_CHID,
ENGINE_STATUS_CTX_ID_TYPE_TSGID,
ENGINE_STATUS_CTX_ID_TYPE_INVALID,
};
const u32 next_id_types[NUM_NEXT_ID_TYPES] = {
ENGINE_STATUS_CTX_NEXT_ID_TYPE_CHID,
ENGINE_STATUS_CTX_NEXT_ID_TYPE_TSGID,
ENGINE_STATUS_CTX_NEXT_ID_TYPE_INVALID,
};
int i;
for (i = 0; i < NUM_CTXSW_STATUS; i++)
{
status.ctxsw_status = ctxsw_status[i];
assert(nvgpu_engine_status_is_ctxsw_switch(&status) ==
(ctxsw_status[i] == NVGPU_CTX_STATUS_CTXSW_SWITCH));
assert(nvgpu_engine_status_is_ctxsw_load(&status) ==
(ctxsw_status[i] == NVGPU_CTX_STATUS_CTXSW_LOAD));
assert(nvgpu_engine_status_is_ctxsw_save(&status) ==
(ctxsw_status[i] == NVGPU_CTX_STATUS_CTXSW_SAVE));
assert(nvgpu_engine_status_is_ctxsw(&status) ==
((ctxsw_status[i] == NVGPU_CTX_STATUS_CTXSW_SWITCH) ||
(ctxsw_status[i] == NVGPU_CTX_STATUS_CTXSW_LOAD) ||
(ctxsw_status[i] == NVGPU_CTX_STATUS_CTXSW_SAVE)));
assert(nvgpu_engine_status_is_ctxsw_invalid(&status) ==
(ctxsw_status[i] == NVGPU_CTX_STATUS_INVALID));
assert(nvgpu_engine_status_is_ctxsw_valid(&status) ==
(ctxsw_status[i] == NVGPU_CTX_STATUS_VALID));
}
for (i = 0; i < NUM_ID_TYPES; i++)
{
u32 ctx_id, ctx_type;
status.ctx_id = i;
status.ctx_id_type = id_types[i];
status.ctx_next_id = 0xcafe;
status.ctx_next_id_type = 0xcafe;
assert(nvgpu_engine_status_is_ctx_type_tsg(&status) ==
(id_types[i] == ENGINE_STATUS_CTX_ID_TYPE_TSGID));
nvgpu_engine_status_get_ctx_id_type(&status,
&ctx_id, &ctx_type);
assert(ctx_id == status.ctx_id);
assert(ctx_type == status.ctx_id_type);
}
for (i = 0; i < NUM_NEXT_ID_TYPES; i++)
{
u32 ctx_next_id, ctx_next_type;
status.ctx_id = 0xcafe;
status.ctx_id_type = 0xcafe;
status.ctx_next_id = i;
status.ctx_next_id_type = next_id_types[i];
assert(nvgpu_engine_status_is_next_ctx_type_tsg(&status) ==
(next_id_types[i] ==
ENGINE_STATUS_CTX_NEXT_ID_TYPE_TSGID));
nvgpu_engine_status_get_next_ctx_id_type(&status,
&ctx_next_id, &ctx_next_type);
assert(ctx_next_id == status.ctx_next_id);
assert(ctx_next_type == status.ctx_next_id_type);
}
ret = UNIT_SUCCESS;
done:
return ret;
}

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/*
* Copyright (c) 2019-2020, NVIDIA CORPORATION. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
* DEALINGS IN THE SOFTWARE.
*/
#ifndef UNIT_NVGPU_ENGINE_STATUS_H
#define UNIT_NVGPU_ENGINE_STATUS_H
#include <nvgpu/types.h>
struct unit_module;
struct gk20a;
/** @addtogroup SWUTS-fifo-engine
* @{
*
* Software Unit Test Specification for fifo/engine
*/
/**
* Test specification for: test_engine_status
*
* Description: Engine status helper functions
*
* Test Type: Feature based
*
* Targets: nvgpu_engine_status_is_ctxsw_switch,
* nvgpu_engine_status_is_ctxsw_load,
* nvgpu_engine_status_is_ctxsw_save,
* nvgpu_engine_status_is_ctxsw,
* nvgpu_engine_status_is_ctxsw_invalid,
* nvgpu_engine_status_is_ctxsw_valid,
* nvgpu_engine_status_is_ctx_type_tsg,
* nvgpu_engine_status_is_next_ctx_type_tsg,
* nvgpu_engine_status_get_ctx_id_type,
* nvgpu_engine_status_get_next_ctx_id_type
*
* Input: None
*
* Steps:
* - Initialize ctxsw_status field of nvgpu_engine_status_info structure with
* with NVGPU_CTX_STATUS_INVALID, NVGPU_CTX_STATUS_VALID,
* NVGPU_CTX_STATUS_CTXSW_LOAD, NVGPU_CTX_STATUS_CTXSW_SAVE,
* NVGPU_CTX_STATUS_CTXSW_SWITCH, and U32(~0).
* - Check that nvgpu_engine_status_is_ctxsw_load,
* nvgpu_engine_status_is_ctxsw_save, nvgpu_engine_status_is_ctxsw,
* nvgpu_engine_status_is_ctxsw_invalid, nvgpu_engine_status_is_ctxsw_valid,
* return consistent values.
* - Initialize ctx_id with a counter and ctx_id_types successively with
* ENGINE_STATUS_CTX_ID_TYPE_CHID, ENGINE_STATUS_CTX_ID_TYPE_TSGID, and
* ENGINE_STATUS_CTX_ID_TYPE_INVALID.
* - Initialize next_ctx_id and next_ctx_id_types with invalid values
* (to make sure accessors use the right fields).
* - Check that nvgpu_engine_status_is_ctx_type_tsg and
* nvgpu_engine_status_get_ctx_id_type return consitent values.
* - Use same method to check nvgpu_engine_status_is_next_ctx_type_tsg and
* nvgpu_engine_status_get_next_ctx_id_type.
*
* Output: Returns PASS if all branches gave expected results. FAIL otherwise.
*/
int test_engine_status(struct unit_module *m,
struct gk20a *g, void *args);
/**
* @}
*/
#endif /* UNIT_NVGPU_ENGINE_STATUS_H */

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/*
* Copyright (c) 2019-2020, NVIDIA CORPORATION. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
* DEALINGS IN THE SOFTWARE.
*/
#include <stdlib.h>
#include <sys/types.h>
#include <unistd.h>
#include <unit/io.h>
#include <unit/unit.h>
#include <nvgpu/channel.h>
#include <nvgpu/channel_sync.h>
#include <nvgpu/dma.h>
#include <nvgpu/engines.h>
#include <nvgpu/engine_status.h>
#include <nvgpu/tsg.h>
#include <nvgpu/gk20a.h>
#include <nvgpu/runlist.h>
#include "hal/init/hal_gv11b.h"
#include <nvgpu/posix/posix-fault-injection.h>
#include "nvgpu/hw/gv11b/hw_top_gv11b.h"
#include "../nvgpu-fifo-common.h"
#include "../nvgpu-fifo-gv11b.h"
#include "nvgpu-engine.h"
#include "nvgpu-engine-status.h"
#define ENGINE_UNIT_DEBUG
#ifdef ENGINE_UNIT_DEBUG
#undef unit_verbose
#define unit_verbose unit_info
#else
#define unit_verbose(unit, msg, ...) \
do { \
if (0) { \
unit_info(unit, msg, ##__VA_ARGS__); \
} \
} while (0)
#endif
int test_engine_setup_sw(struct unit_module *m,
struct gk20a *g, void *args)
{
return UNIT_FAIL;
}
int test_engine_init_info(struct unit_module *m,
struct gk20a *g, void *args)
{
return UNIT_FAIL;
}
int test_engine_ids(struct unit_module *m,
struct gk20a *g, void *args)
{
return UNIT_FAIL;
}
int test_engine_is_valid_runlist_id(struct unit_module *m,
struct gk20a *g, void *args)
{
return UNIT_FAIL;
}
int test_engine_get_fast_ce_runlist_id(struct unit_module *m,
struct gk20a *g, void *args)
{
return UNIT_FAIL;
}
int test_engine_get_gr_runlist_id(struct unit_module *m,
struct gk20a *g, void *args)
{
return UNIT_FAIL;
}
int test_engine_get_active_eng_info(struct unit_module *m,
struct gk20a *g, void *args)
{
return UNIT_FAIL;
}
int test_engine_interrupt_mask(struct unit_module *m,
struct gk20a *g, void *args)
{
return UNIT_FAIL;
}
int test_engine_mmu_fault_id(struct unit_module *m,
struct gk20a *g, void *args)
{
return UNIT_FAIL;
}
int test_engine_mmu_fault_id_veid(struct unit_module *m,
struct gk20a *g, void *args)
{
return UNIT_FAIL;
}
int test_engine_get_mask_on_id(struct unit_module *m,
struct gk20a *g, void *args)
{
return UNIT_FAIL;
}
int test_engine_find_busy_doing_ctxsw(struct unit_module *m,
struct gk20a *g, void *args)
{
return UNIT_FAIL;
}
int test_engine_get_runlist_busy_engines(struct unit_module *m,
struct gk20a *g, void *args)
{
return UNIT_FAIL;
}
struct unit_module_test nvgpu_engine_tests[] = {
UNIT_TEST(setup_sw, test_engine_setup_sw, NULL, 2),
UNIT_TEST(init_support, test_fifo_init_support, NULL, 2),
UNIT_TEST(init_info, test_engine_init_info, NULL, 2),
UNIT_TEST(ids, test_engine_ids, NULL, 2),
UNIT_TEST(get_active_eng_info, test_engine_get_active_eng_info, NULL, 2),
UNIT_TEST(interrupt_mask, test_engine_interrupt_mask, NULL, 2),
UNIT_TEST(get_fast_ce_runlist_id, test_engine_get_fast_ce_runlist_id, NULL, 2),
UNIT_TEST(get_gr_runlist_id, test_engine_get_gr_runlist_id, NULL, 2),
UNIT_TEST(is_valid_runlist_id, test_engine_is_valid_runlist_id, NULL, 2),
UNIT_TEST(mmu_fault_id, test_engine_mmu_fault_id, NULL, 2),
UNIT_TEST(mmu_fault_id_veid, test_engine_mmu_fault_id_veid, NULL, 2),
UNIT_TEST(get_mask_on_id, test_engine_get_mask_on_id, NULL, 2),
UNIT_TEST(status, test_engine_status, NULL, 2),
UNIT_TEST(find_busy_doing_ctxsw, test_engine_find_busy_doing_ctxsw, NULL, 2),
UNIT_TEST(get_runlist_busy_engines, test_engine_get_runlist_busy_engines, NULL, 2),
UNIT_TEST(remove_support, test_fifo_remove_support, NULL, 2),
};
UNIT_MODULE(nvgpu_engine, nvgpu_engine_tests, UNIT_PRIO_NVGPU_TEST);

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/*
* Copyright (c) 2019-2020, NVIDIA CORPORATION. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
* DEALINGS IN THE SOFTWARE.
*/
#ifndef UNIT_NVGPU_ENGINE_H
#define UNIT_NVGPU_ENGINE_H
#include <nvgpu/types.h>
struct unit_module;
struct gk20a;
/** @addtogroup SWUTS-fifo-engine
* @{
*
* Software Unit Test Specification for fifo/engine
*/
/**
* Test specification for: test_engine_setup_sw
*
* Description: Branch coverage for nvgpu_engine_setup/cleanup_sw.
*
* Test Type: Feature
*
* Targets: nvgpu_engine_setup_sw, nvgpu_engine_cleanup_sw
*
* Input: None
*
* Steps:
* - Check valid case for nvgpu_engine_setup_sw.
* - Check valid case for nvgpu_engine_cleanup_sw.
* - Check invalid case for nvgpu_engine_setup_sw.
* - Failure to allocate engine contexts (w/ fault injection)
* - Failure to allocate active engines list (w/ fault injection)
* - Failure to initialize engine info (using stub for
* g->ops.engine.init_info)
*
* Output: Returns PASS if all branches gave expected results. FAIL otherwise.
*/
int test_engine_setup_sw(struct unit_module *m,
struct gk20a *g, void *args);
/**
* Test specification for: test_engine_init_info
*
* Description: Branch coverage for nvgpu_engine_init_info
*
* Test Type: Feature
*
* Targets: nvgpu_engine_init_info
*
* Input: test_fifo_init_support must have run.
*
* Steps:
* - Check valid cases for nvgpu_engine_init_info using gv11b HALs.
* - Check that function returns 0 and that number of engines is > 0.
* - Check invalid cases for nvgpu_engine_init_info:
* - g->ops.top.get_device_info is NULL
* - g->ops.top.get_device_info returns failure
* - g->ops.pbdma.find_for_runlist fails to find PBDMA servicing the engine.
* - Check that function returns < 0 and that number of engines is 0.
*
* Output: Returns PASS if all branches gave expected results. FAIL otherwise.
*/
int test_engine_init_info(struct unit_module *m,
struct gk20a *g, void *args);
/**
* Test specification for: test_engine_ids
*
* Description: Branch coverage for engine ids
*
* Test Type: Feature
*
* Targets: nvgpu_engine_get_ids, nvgpu_engine_check_valid_id,
* nvgpu_engine_get_gr_id
*
* Input: test_fifo_init_support must have run.
*
* Steps:
* - Check nvgpu_engine_check_valid_id returns false for U32_MAX
* - Get engine ids for all engine enums in NVGPU_ENGINE_GR to
* NVGPU_ENGINE_INVAL
* - Check that all returned ids are valid with nvgpu_engine_check_valid_id.
* - Check that nvgpu_engine_get_gr_id is in the returned ids for
* NVGPU_ENGINE_GR
* - Build a mask of CE engines (for other test use)
* - Build a mask of active engines (for other test use)
*
* Output: Returns PASS if all branches gave expected results. FAIL otherwise.
*/
int test_engine_ids(struct unit_module *m,
struct gk20a *g, void *args);
/**
* Test specification for: test_engine_get_fast_ce_runlist_id
*
* Description: Get Asynchronous CE runlist id
*
* Test Type: Feature based
*
* Targets: nvgpu_engine_get_fast_ce_runlist_id
*
* Input: test_fifo_init_support must have run.
*
* Steps:
* - Check that nvgpu_engine_get_fast_ce_runlist_id returns valid id.
* - Check that NVGPU_INVALID_ENG_ID is returned when g is NULL.
*
* Output: Returns PASS if all branches gave expected results. FAIL otherwise.
*/
int test_engine_get_fast_ce_runlist_id(struct unit_module *m,
struct gk20a *g, void *args);
/**
* Test specification for: test_nvgpu_engine_get_gr_runlist_id
*
* Description: Get GR runlist id
*
* Test Type: Feature based
*
* Targets: nvgpu_engine_get_gr_runlist_id
*
* Input: test_fifo_init_support must have run.
*
* Steps:
* - Check that nvgpu_engine_get_gr_runlist_id returns valid id.
* - Check case where NVGPU_ENGINE_GR is not found.
* - Check case where an entry is found for NVGPU_ENGINE_GR, but
* the HW engine_id is invalid.
*
* Output: Returns PASS if all branches gave expected results. FAIL otherwise.
*/
int test_engine_get_gr_runlist_id(struct unit_module *m,
struct gk20a *g, void *args);
/**
* Test specification for: test_engine_is_valid_runlist_id
*
* Description: Check is runlist Id is valid
*
* Test Type: Feature based
*
* Targets: nvgpu_engine_is_valid_runlist_id
*
* Input: test_fifo_init_support must have run.
*
* Steps:
* - Check that nvgpu_engine_is_valid_runlist_id returns true for
* active engines's runlist_id.
* - Check that false is returned when g is NULL.
* - Check that false is returned for NVGPU_INVALID_RUNLIST_ID.
*
* Output: Returns PASS if all branches gave expected results. FAIL otherwise.
*/
int test_engine_is_valid_runlist_id(struct unit_module *m,
struct gk20a *g, void *args);
/**
* Test specification for: test_engine_get_active_eng_info
*
* Description: Branch coverage for nvgpu_engine_get_active_eng_info
*
* Test Type: Feature
*
* Targets: nvgpu_engine_get_active_eng_info, nvgpu_engine_check_valid_id
*
* Input: test_engine_ids must have run.
*
* Steps:
* - For each H/W engine id, call nvgpu_engine_get_active_eng_info:
* - Check that info is non NULL for active engines.
* - Check that info is NULL for inactive engines.
* - Check that nvgpu_engine_get_active_eng_info returns NULL when g == NULL.
* - Check that nvgpu_engine_get_active_eng_info returns NULL when f->max_engines == 0.
* - Check that nvgpu_engine_get_active_eng_info returns NULL when f->num_engines == 0.
*
* Output: Returns PASS if all branches gave expected results. FAIL otherwise.
*/
int test_engine_get_active_eng_info(struct unit_module *m,
struct gk20a *g, void *args);
/**
* Test specification for: test_engine_enum_from_type
*
* Description: Branch coverage for nvgpu_engine_enum_from_type
*
* Test Type: Feature
*
* Targets: nvgpu_engine_enum_from_type
*
* Input: test_engine_ids must have run.
*
* Steps:
* - For each HW enum type, call nvgpu_engine_enum_from_type.
* - Check that NVGPU_ENGINE_GR is returned for
* top_device_info_type_enum_graphics_v().
* - Check that NVGPU_ENGINE_ASYNC_CE is returned for
* top_device_info_type_enum_lce_v().
* - Check that NVGPU_ENGINE_INVAL is returned for other values.
*
* Output: Returns PASS if all branches gave expected results. FAIL otherwise.
*/
int test_engine_enum_from_type(struct unit_module *m,
struct gk20a *g, void *args);
/**
* Test specification for: test_engine_interrupt_mask
*
* Description: Engine interrupt masks
*
* Test Type: Feature
*
* Targets: nvgpu_gr_engine_interrupt_mask, nvgpu_ce_engine_interrupt_mask,
* nvgpu_engine_act_interrupt_mask, nvgpu_engine_get_all_ce_reset_mask
*
* Input: test_engine_ids must have run.
*
* Steps:
* - Get interrupt mask for all engines using ngpu_engine_interrupt_mask.
* - Check that engine_intr_mask in non NULL
* - For each active engine, get interrupt mask with
* nvgpu_engine_act_interrupt_mask.
* - Check that mask in non NULL
* - Check that mask is contained in engine_intr_mask.
* - Check that engine_intr_mask only contains active engines
* - Get CE reset mask using nvgpu_engine_get_all_ce_reset_mask
* - Check that ce_reset_mask == ce_mask (from unit context)
*
* Output: Returns PASS if all branches gave expected results. FAIL otherwise.
*/
int test_engine_interrupt_mask(struct unit_module *m,
struct gk20a *g, void *args);
/**
* Test specification for: test_engine_mmu_fault_id
*
* Description: Engine ID to MMU fault ID conversions
*
* Test Type: Feature based
*
* Targets: nvgpu_engine_id_to_mmu_fault_id,
* nvgpu_engine_mmu_fault_id_to_engine_id
*
* Input: test_fifo_init_support must have run.
*
* Steps:
* - For each engine_id (including invalid one)
* - Get engine_info using nvgpu_engine_get_active_eng_info.
* - Get fault_id using nvgpu_engine_id_to_mmu_fault_id.
* - For valid engine ids, check that fault_id matches the one
* from engine_info, else check that returned fault_id is invalid.
* - Get engine_id using nvgpu_engine_mmu_fault_id_to_engine_id.
* - For valid engine ids, check that engine_id matches the one
* from engine_info, else check that returned engine_id is invalid.
*
* Output: Returns PASS if all branches gave expected results. FAIL otherwise.
*/
int test_engine_mmu_fault_id(struct unit_module *m,
struct gk20a *g, void *args);
/**
* Test specification for: test_engine_mmu_fault_id_veid
*
* Description: Engine ID to MMU fault ID conversions
*
* Test Type: Feature based
*
* Targets: nvgpu_engine_mmu_fault_id_to_veid,
* nvgpu_engine_mmu_fault_id_to_eng_id_and_veid,
* nvgpu_engine_mmu_fault_id_to_eng_ve_pbdma_id,
* nvgpu_engine_runqueue_sel
*
* Input: test_fifo_init_support must have run.
*
* Steps:
* - For each engine_id (including invalid one)
* - Get engine_info using nvgpu_engine_get_active_eng_info.
* - Get fault_id using nvgpu_engine_id_to_mmu_fault_id.
* - Get engine_id using nvgpu_engine_mmu_fault_id_to_engine_id and
* nvgpu_engine_mmu_fault_id_to_eng_id_and_veid.
* - For valid engine ids, check that engine_id matches the one
* from engine_info, else check that returned engine_id is invalid.
*
* - Cover the following cases for nvgpu_engine_mmu_fault_id_to_veid:
* - gr_eng_fault_id <= mmu_fault_id < (gr_eng_fault_id + num_subctx),
* returned veid should be in [0..num_subctx-1] range.
* - mmu_fault_id out of above range, in which case returned veid
* must be INVAL_ID.
*
* - Call nvgpu_engine_mmu_fault_id_to_eng_id_and_veid for all
* possible GR MMU fault ids, and check that function returns
* GR's active engine id, and sets veid properly.
* MMU fault id, and check that function returns CE's active
* engine id, but veid is not set.
* - Call nvgpu_engine_mmu_fault_id_to_eng_id_and_veid for a CE
* MMU fault id, and check that function returns CE's active
* engine id, but veid is not set.
*
* - Check that nvgpu_engine_mmu_fault_id_to_eng_ve_pbdma_id looks
* up pbdma_id when active engine id was found. Check that it
* returns invalid PBDMA id otherwise.
*
* Output: Returns PASS if all branches gave expected results. FAIL otherwise.
*/
int test_engine_mmu_fault_id_veid(struct unit_module *m,
struct gk20a *g, void *args);
/**
* Test specification for: test_engine_get_mask_on_id
*
* Description: Get mask of engines TSG/ch is loaded on
*
* Test Type: Feature based
*
* Targets: nvgpu_engine_get_mask_on_id, nvgpu_engine_get_id_and_type
*
* Input: test_engine_ids must have run.
*
* Steps:
* - Call nvgpu_engine_get_mask_on_id with a combination of type
* (TSG or channel), and incrementing the id.
* - Using a stub for g->ops.engine_status.read_engine_status_info,
* cover the following cases:
* - Engine is busy or idle.
* - Context switch is loading a context, or not (which determines
* whether to check against ctx_next_id or ctx_id).
* - Context on engine has the same type (TSG/ch) or not.
* - Context on engine has the same id, or not.
* - Check that nvgpu_engine_get_id_and_type returns expected id and type.
* - Check that the mask is only set when engine is busy, and
* context has same id and type.
*
* Output: Returns PASS if all branches gave expected results. FAIL otherwise.
*/
int test_engine_get_mask_on_id(struct unit_module *m,
struct gk20a *g, void *args);
/**
* Test specification for: test_engine_find_busy_doing_ctxsw
*
* Description: Find busy engine doing context switch
*
* Test Type: Feature based
*
* Targets: nvgpu_engine_find_busy_doing_ctxsw
*
* Input: test_fifo_init_support must have run.
*
* Steps:
* - Use stub for g->ops.engine_status.read_engine_status_info, to
* emulate engine status:
* - Busy/idle state.
* - Context switch status (VALID, LOAD or SAVE).
* - Set ctx_id and ctx_id_type as per context switch status.
* - Set ctx_next_id and ctx_next_id_type as per context switch status.
* - Use stub for g->ops.gr.falcon_read_fecs_ctxsw_mailbox, to
* emulate current FECS method.
* - Call nvgpu_engine_find_busy_doing_ctxsw, and check that:
* - When engine is idle, or not doing a context switch,
* NVGPU_INVALID_ENG_ID is returned, and other parameters
* are not modified.
* - When engine is busy and doing a context switch, engine_id
* is returned, is_tsg is true and id matches expected TSG id.
*
* Output: Returns PASS if all branches gave expected results. FAIL otherwise.
*/
int test_engine_find_busy_doing_ctxsw(struct unit_module *m,
struct gk20a *g, void *args);
/**
* Test specification for: test_engine_get_runlist_busy_engines
*
* Description: Get busy engines serviced by a given runlist
*
* Test Type: Feature based
*
* Targets: nvgpu_engine_get_runlist_busy_engines
*
* Input: test_fifo_init_support must have run.
*
* Steps:
* - Use stub for g->ops.engine_status.read_engine_status_info, to
* emulate busy/idle state for engine.
* - Build f->engine_info and f->active_engines_list, to cover the
* following cases for nvgpu_engine_get_runlist_busy_engines:
* - Engine has same runlist_id, and is busy.
* - Engine has same runlist_id, but is idle.
* - No engine with matching runlist_id was found.
* - No engine at all (f->num_engines = 0).
* - Check that returned mask is non-zero only for the first case
* (busy and matching runlist_id).
*
* Output: Returns PASS if all branches gave expected results. FAIL otherwise.
*/
int test_engine_get_runlist_busy_engines(struct unit_module *m,
struct gk20a *g, void *args);
/**
* @}
*/
#endif /* UNIT_NVGPU_ENGINE_H */