diff --git a/drivers/gpu/nvgpu/common/vgpu/ltc/ltc_vgpu.c b/drivers/gpu/nvgpu/common/vgpu/ltc/ltc_vgpu.c
index 87637e007..c8a369707 100644
--- a/drivers/gpu/nvgpu/common/vgpu/ltc/ltc_vgpu.c
+++ b/drivers/gpu/nvgpu/common/vgpu/ltc/ltc_vgpu.c
@@ -1,7 +1,7 @@
 /*
  * Virtualized GPU L2
  *
- * Copyright (c) 2014-2019 NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2014-2021 NVIDIA CORPORATION.  All rights reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a
  * copy of this software and associated documentation files (the "Software"),
@@ -24,7 +24,9 @@
 
 #include <nvgpu/gk20a.h>
 #include <nvgpu/vgpu/vgpu.h>
+#include <nvgpu/vgpu/tegra_vgpu.h>
 
+#include "common/vgpu/ivc/comm_vgpu.h"
 #include "ltc_vgpu.h"
 
 u64 vgpu_determine_L2_size_bytes(struct gk20a *g)
@@ -47,3 +49,54 @@ void vgpu_ltc_init_fs_state(struct gk20a *g)
 	ltc->cacheline_size = priv->constants.cacheline_size;
 	ltc->slices_per_ltc = priv->constants.slices_per_ltc;
 }
+
+#ifdef CONFIG_NVGPU_DEBUGGER
+
+int vgpu_ltc_get_max_ways_evict_last(struct gk20a *g, struct nvgpu_tsg *tsg,
+		u32 *num_ways)
+{
+	struct tegra_vgpu_cmd_msg msg = {};
+	struct tegra_vgpu_l2_max_ways_evict_last_params *p =
+				&msg.params.l2_max_ways_evict_last;
+	int err;
+
+	msg.cmd = TEGRA_VGPU_CMD_TSG_GET_L2_MAX_WAYS_EVICT_LAST;
+	msg.handle = vgpu_get_handle(g);
+	p->tsg_id = tsg->tsgid;
+	err = vgpu_comm_sendrecv(&msg, sizeof(msg), sizeof(msg));
+	err = err ? err : msg.ret;
+
+	if (unlikely(err)) {
+		nvgpu_err(g, "failed to get L2 max ways evict last, err %d",
+			err);
+	} else {
+		*num_ways = p->num_ways;
+	}
+
+	return err;
+}
+
+int vgpu_ltc_set_max_ways_evict_last(struct gk20a *g, struct nvgpu_tsg *tsg,
+		u32 num_ways)
+{
+	struct tegra_vgpu_cmd_msg msg = {};
+	struct tegra_vgpu_l2_max_ways_evict_last_params *p =
+				&msg.params.l2_max_ways_evict_last;
+	int err;
+
+	msg.cmd = TEGRA_VGPU_CMD_TSG_SET_L2_MAX_WAYS_EVICT_LAST;
+	msg.handle = vgpu_get_handle(g);
+	p->tsg_id = tsg->tsgid;
+	p->num_ways = num_ways;
+	err = vgpu_comm_sendrecv(&msg, sizeof(msg), sizeof(msg));
+	err = err ? err : msg.ret;
+
+	if (unlikely(err)) {
+		nvgpu_err(g, "failed to set L2 max ways evict last, err %d",
+			err);
+	}
+
+	return err;
+}
+
+#endif
diff --git a/drivers/gpu/nvgpu/common/vgpu/ltc/ltc_vgpu.h b/drivers/gpu/nvgpu/common/vgpu/ltc/ltc_vgpu.h
index 9eaddd4f7..3588a539b 100644
--- a/drivers/gpu/nvgpu/common/vgpu/ltc/ltc_vgpu.h
+++ b/drivers/gpu/nvgpu/common/vgpu/ltc/ltc_vgpu.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2017-2019, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2017-2021, NVIDIA CORPORATION.  All rights reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a
  * copy of this software and associated documentation files (the "Software"),
@@ -29,4 +29,11 @@ struct gr_gk20a;
 u64 vgpu_determine_L2_size_bytes(struct gk20a *g);
 void vgpu_ltc_init_fs_state(struct gk20a *g);
 
+#ifdef CONFIG_NVGPU_DEBUGGER
+int vgpu_ltc_get_max_ways_evict_last(struct gk20a *g, struct nvgpu_tsg *tsg,
+		u32 *num_ways);
+int vgpu_ltc_set_max_ways_evict_last(struct gk20a *g, struct nvgpu_tsg *tsg,
+		u32 num_ways);
+#endif
+
 #endif /* NVGPU_LTC_VGPU_H */
diff --git a/drivers/gpu/nvgpu/include/nvgpu/vgpu/tegra_vgpu.h b/drivers/gpu/nvgpu/include/nvgpu/vgpu/tegra_vgpu.h
index 01ee4c62c..92641b58c 100644
--- a/drivers/gpu/nvgpu/include/nvgpu/vgpu/tegra_vgpu.h
+++ b/drivers/gpu/nvgpu/include/nvgpu/vgpu/tegra_vgpu.h
@@ -119,6 +119,8 @@ enum {
 	TEGRA_VGPU_CMD_GR_SET_MMU_DEBUG_MODE = 89,
 	TEGRA_VGPU_CMD_PERFBUF_INST_BLOCK_MGT = 90,
 	TEGRA_VGPU_CMD_TSG_SET_LONG_TIMESLICE = 91,
+	TEGRA_VGPU_CMD_TSG_GET_L2_MAX_WAYS_EVICT_LAST = 92,
+	TEGRA_VGPU_CMD_TSG_SET_L2_MAX_WAYS_EVICT_LAST = 93,
 };
 
 struct tegra_vgpu_connect_params {
@@ -651,6 +653,11 @@ struct tegra_vgpu_gr_set_mmu_debug_mode_params {
 	u8 enable;
 };
 
+struct tegra_vgpu_l2_max_ways_evict_last_params {
+	u32 tsg_id;
+	u32 num_ways;
+};
+
 struct tegra_vgpu_cmd_msg {
 	u32 cmd;
 	int ret;
@@ -717,6 +724,7 @@ struct tegra_vgpu_cmd_msg {
 		struct tegra_vgpu_fb_set_mmu_debug_mode_params fb_set_mmu_debug_mode;
 		struct tegra_vgpu_gr_set_mmu_debug_mode_params gr_set_mmu_debug_mode;
 		struct tegra_vgpu_perfbuf_inst_block_mgt_params perfbuf_inst_block_management;
+		struct tegra_vgpu_l2_max_ways_evict_last_params l2_max_ways_evict_last;
 		char padding[184];
 	} params;
 };